JPS59182799U

JPS59182799U - level meter

Info

Publication number: JPS59182799U
Application number: JP7459583U
Authority: JP
Inventors: 毅竹内
Original assignee: カシオ計算機株式会社
Priority date: 1983-05-20
Filing date: 1983-05-20
Publication date: 1984-12-05

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図はこの考案をテープレコーダに利用した一実施例
の要部の回路図、第２図は表示装置の構成例を示す図、
第３図は信号φ、　　ａ、　　ｂのタイムチャートを示
す図、第４図は表示例を示す図である。１・・・・・・Ａ／Ｄ変換回路、２・・・・・・Ｐ／Ｓ
変換回路、３１〜３１６・・・・・・シフトレジスタ、
４□〜４□６・・・・・・バッファ、５□〜５１６・・
・・・・デコーダ、６・・・・・・駆動回路、７・・・
・・・表示装置、８１〜８１５．１Ｇ、〜１０１５・・
・・・・アンドゲート、９１〜９１５・・・・・・オア
ゲート、１１・・・・・・、イン六−タ。FIG. 1 is a circuit diagram of the main parts of an embodiment in which this invention is applied to a tape recorder, and FIG. 2 is a diagram showing an example of the configuration of a display device.
FIG. 3 is a diagram showing a time chart of signals φ, a, and b, and FIG. 4 is a diagram showing a display example. 1...A/D conversion circuit, 2...P/S
Conversion circuit, 31-316...shift register,
4□~4□6...Buffer, 5□~516...
...Decoder, 6...Drive circuit, 7...
...Display device, 81-815.1G, ~1015...
...and gate, 91-915...or gate, 11..., in6-ta.

Claims

[Scope of utility model registration request]

means for sampling a continuously changing signal level at predetermined time intervals; means for sequentially shifting the sampled signal level to the next stage; A level meter comprising a plurality of display means each displaying a signal level within a period, and displaying the signal level in chronological order.