JPS59158569A - Diode element - Google Patents

Diode element

Info

Publication number
JPS59158569A
JPS59158569A JP58032139A JP3213983A JPS59158569A JP S59158569 A JPS59158569 A JP S59158569A JP 58032139 A JP58032139 A JP 58032139A JP 3213983 A JP3213983 A JP 3213983A JP S59158569 A JPS59158569 A JP S59158569A
Authority
JP
Japan
Prior art keywords
film
electrode
contact
metal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58032139A
Other languages
Japanese (ja)
Inventor
Kiyoshi Ozawa
清 小沢
Nobuyoshi Takagi
高城 信義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58032139A priority Critical patent/JPS59158569A/en
Publication of JPS59158569A publication Critical patent/JPS59158569A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes

Abstract

PURPOSE:To increase close adhesion property between an electrode and a substrate sufficiently, and to obtain excellent characteristics by forming a rectifying contact by a semiconductor film and a second metallic film and an ohmic contact by the semiconductor film and a third metallic film and bringing the semiconductor film and a first metallic film into contact through an oxide film made of a metal. CONSTITUTION:A resist film 2 is applied and formed on a glass substrate 1, an opening is bored in a rectifying contact electrode forming region, and a Ti film 3 and a Pt film 4 are formed. The films on the resist film 2 are also removed by exfoliating the resist film 2, and a rectifying contact electrode in which the Pt film 4 is formed through the Ti film 3 is shaped. An oxide film 3 in Ti is formed to the exposed surface of the Ti film 3. An amorphous Si film 6, an electrode 7 being in ohmic-contact with the amorphous Si film 6 and an electrode 8 connected to the Pt electrode 4 are formed. The amorphous Si film 6 is formed through a glow discharge decomposition method of SiH4 and patterned, and the electrode 7 and the electrode 8 are formed by using Al.

Description

【発明の詳細な説明】 ja)  発明の技術分野 本発明は絶縁性基板上に形成される膜ダイオード素子の
構造に関する。
DETAILED DESCRIPTION OF THE INVENTION ja) Technical Field of the Invention The present invention relates to the structure of a membrane diode element formed on an insulating substrate.

(b)  技術の背景 絶縁性基板上にダイオード、フォトダイオードもしくは
トランジスタ等の半導体素子を直接形成するならば、下
記の様な効果を得ることができる。
(b) Background of the Technology If semiconductor elements such as diodes, photodiodes, or transistors are directly formed on an insulating substrate, the following effects can be obtained.

(イ)各素子相互間の電気的分離が容易にかつ確実に達
成されて、動作の信頼度が向上する。
(a) Electrical isolation between each element is easily and reliably achieved, improving reliability of operation.

(ロ)素子相互間の干渉が少々く素子間隔を短縮して高
密度化が可能である。
(b) There is little interference between elements, and the element spacing can be shortened to achieve higher density.

(ハ)基板との間の容量は存在せず導線寄生容量は無視
できる程度となるので、過渡的な電力が大幅に減少して
、動作速度2周波数特性が向上する。
(c) Since there is no capacitance with the substrate and the conductor parasitic capacitance is negligible, transient power is significantly reduced and the operating speed and two-frequency characteristics are improved.

に)寄生パラメータ極小の膜受動素子が同一基板上に形
成できるので、安定した回路の製作が容易である。従っ
て複合回路などにおいで膜ダイオード米子が開発され実
用化されている。
2) Since film passive elements with minimal parasitic parameters can be formed on the same substrate, it is easy to manufacture stable circuits. Therefore, membrane diodes Yonago have been developed and put into practical use in complex circuits and the like.

fcl  従来技術と問題点 絶縁性基板上に形成される膜ダイオード素子は、一般に
半導体皮膜と、これを挟んで半導体皮膜に対して整流性
接触を々す第1の金属皮膜と、半導体皮膜に対してオー
ミ、り接触をなす第2の金属皮膜とによって構成される
。その半導体皮膜としては例えば非晶質シリコン(Si
)を、S】に対して整流性接触をなす第1の電極金属と
しては例えば白金(Pt )又はパラジウム(Pd)を
、Siに対してオーミック接触をなす第2の電極金属と
しては例えばアルミニウム<ht)を用いることができ
る。
fcl Prior Art and Problems A membrane diode element formed on an insulating substrate generally includes a semiconductor film, a first metal film sandwiching the first metal film that makes rectifying contact with the semiconductor film, and a first metal film that makes rectifying contact with the semiconductor film. and a second metal film in ohmic contact. As the semiconductor film, for example, amorphous silicon (Si
), the first electrode metal that makes rectifying contact with S is, for example, platinum (Pt) or palladium (Pd), and the second electrode metal that makes ohmic contact with Si is, for example, aluminum < ht) can be used.

また絶縁性基板としては、ガラス及びセラミックがあけ
られるが、セラミック&板は表面の平滑性を改善するた
めにその表面にガラス質がコートされたグレーズドセラ
ミックが適している。
Glass and ceramic can be used as the insulating substrate, and glazed ceramic whose surface is coated with glass to improve surface smoothness is suitable for the ceramic and plate.

従来性なわれている前記材料によって構成されル膜タイ
オードは、少なくとも表面がガラス質である絶縁性基板
面に接してAt電極が設けられ、Pt電極は基板面に接
しない構造とされている。これはPt又(はPd等の皮
膜はガラス質基板面との密着性が乏しく、素子の信頼性
の確保が困難であることに起因する。
A conventional membrane diode made of the above-mentioned material has a structure in which an At electrode is provided in contact with an insulating substrate whose surface is at least glassy, and a Pt electrode is not in contact with the substrate surface. This is due to the fact that the film made of Pt (or Pd, etc.) has poor adhesion to the surface of the glass substrate, making it difficult to ensure the reliability of the device.

しかしながら膜ダイオード等の膜半導体素子は複合回路
の素子として用いられる場合が多く、同一基板上に形成
される他の能動素子或いは受動素子との間でその製造工
程を調和させること、もしくは例えばガラス基板側を光
入射面とするフォトダイオードと複合回路を形成するな
ど素子を形成する皮膜の配列順序を調和させることがし
ばしば要望される。
However, membrane semiconductor devices such as membrane diodes are often used as elements of composite circuits, and it is necessary to harmonize the manufacturing process with other active or passive devices formed on the same substrate, or to use a glass substrate, for example. It is often desired to harmonize the arrangement order of the films forming elements, such as forming a composite circuit with a photodiode whose side is the light incident surface.

この要望に対処するために、脱ダイオード素子について
従来の構造を反転して、Pt又はPd等のSi等と整流
性接触を形成する金属電極を基板側に形成し、かつ優れ
た特性及び信頼性が得られるダイオード素子が必要とさ
れている。
In order to meet this demand, we reversed the conventional structure of the non-diode element, formed a metal electrode on the substrate side that forms a rectifying contact with Si such as Pt or Pd, and achieved excellent characteristics and reliability. There is a need for a diode device that provides the following.

+d)  発明の目的 本発明は膜ダイオード素子に関して、絶縁性基板側に半
導体皮膜と整流性接触をなす電極を形成し、該電極と基
板との間の密着性が充分であって、良好な特性が得られ
る構造を提供することを目的とする。
+d) Purpose of the Invention The present invention relates to a membrane diode element, in which an electrode is formed on an insulating substrate side to make rectifying contact with a semiconductor film, and the adhesion between the electrode and the substrate is sufficient, resulting in good characteristics. The purpose is to provide a structure that can obtain the following.

te)  発明の構成 第2の金属皮膜と、該第2の金属皮膜に接する半導体皮
膜と、該半導体皮膜に接する第3の金属皮膜とを備えて
、前記半導体皮膜と前記第2の金属皮膜とは整流性接触
を、前記半導体皮膜と前記第3の金属皮膜とはオーミ、
り接触を形成し、かつ、前記半導体皮膜と前記第1の金
属皮膜とは、該第1の金属皮膜を形成する金属の酸化膜
を介して接して疫るダイオード素子により達成される。
te) Structure of the invention A second metal film, a semiconductor film in contact with the second metal film, and a third metal film in contact with the semiconductor film, wherein the semiconductor film and the second metal film are connected to each other. is a rectifying contact, the semiconductor film and the third metal film are ohmic,
The contact between the semiconductor film and the first metal film is achieved by a diode element in which the semiconductor film and the first metal film are in contact with each other through a metal oxide film forming the first metal film.

更に前記第1の金属皮膜は、例えばチタン、タンタル、
ニオビウム、モリブデンもしくはタングステンのうち少
くとも一種の金属、又は前記金属とアルミニウムもしく
はシリコンとの合金もしくは化合物によって形成するこ
とができる。
Further, the first metal film may be made of, for example, titanium, tantalum,
It can be formed from at least one metal selected from niobium, molybdenum, and tungsten, or an alloy or compound of the metal and aluminum or silicon.

げ)発明の実施例 以下本発明を実施例により図面を参照して具体的に説明
する。
G) Embodiments of the Invention The present invention will be specifically explained below by way of embodiments with reference to the drawings.

第1図乃至第3図は本発明の実施例の主要製造工程にお
ける状態を示す断面図である。
1 to 3 are cross-sectional views showing the main manufacturing steps of the embodiment of the present invention.

第1図参照 ガラス基板1上にレジスト膜2を塗布形成し、リングラ
フィ法によって整流性接触電極形成領域に開口を設ける
。しかる後蒸着法等によって、チタン(Ti)皮膜3を
厚さ例えば15Cnml程度に、次いで白金(Pt)皮
膜4を厚さ例えば25[nm]程度に形成する。レジス
ト膜2を剥離することによって、レジスト膜2上の前記
皮膜も除去されて、Ti皮膜3を介してpt皮膜4が設
けられた整流性接触電極が形成される。
Referring to FIG. 1, a resist film 2 is coated and formed on a glass substrate 1, and an opening is formed in a rectifying contact electrode formation region by phosphorography. A titanium (Ti) film 3 is formed to a thickness of, for example, about 15 C nm, and a platinum (Pt) film 4 is then formed to a thickness of, for example, about 25 [nm] by a post-evaporation method or the like. By peeling off the resist film 2, the film on the resist film 2 is also removed, and a rectifying contact electrode provided with the PT film 4 via the Ti film 3 is formed.

先に述べた如くガラス基板1に対してpt皮膜は密着性
が乏しいのに対してTi皮膜3は密着性が良く、これを
介してpt皮膜4を設けることによって、Pt電極をガ
ラス基板1上に安定して形成することができる。
As mentioned earlier, the PT film has poor adhesion to the glass substrate 1, whereas the Ti film 3 has good adhesion, and by providing the PT film 4 through this, the Pt electrode can be attached to the glass substrate 1. can be formed stably.

第2図参照 前記Ti皮膜3の表出面にその酸化膜5を形成する。See Figure 2 An oxide film 5 is formed on the exposed surface of the Ti film 3.

Ti皮膜3は先に述べた如くガラス基板1とpt皮膜4
との間の密着性を向上するために挿入したものであって
、その表出面の面積はpt皮膜4に比較すれば遥に小さ
い。しかしながらこの2層構造るのに対して、Tiは約
0.3 (eV :)と小さく、ダイオード素子の逆方
向電流の密度がT1はptの数10倍程度以上とガって
、ダイオード素子の逆方向特性が大幅に劣化する。この
逆方向電流を阻止するために本発明においてはT1皮膜
3の表出面にTi酸化膜5を形成する。
As mentioned above, the Ti film 3 is formed by connecting the glass substrate 1 and the PT film 4.
It is inserted to improve the adhesion between the PT film 4 and the surface area of its exposed surface is much smaller than that of the PT film 4. However, in contrast to this two-layer structure, Ti is small at about 0.3 (eV:), and the reverse current density T1 of the diode element is several tens of times higher than PT. Reverse characteristics deteriorate significantly. In order to prevent this reverse current, a Ti oxide film 5 is formed on the exposed surface of the T1 film 3 in the present invention.

本実施例においては、Ti酸化膜5の形成にプラズマ陽
極酸化法を適用して、圧力1 [Torr)程度に酸素
((、)2)ガスを導入した処理室に前記基板1を置き
時間20分間程度の処理を実施している。
In this example, the plasma anodic oxidation method is applied to the formation of the Ti oxide film 5, and the substrate 1 is placed in a processing chamber into which oxygen ((,)2) gas is introduced at a pressure of about 1 Torr. The processing takes about minutes.

第3図参照 非晶質Si皮膜6、非晶質Si皮膜6にオーミ。See Figure 3 Amorphous Si film 6, Ohmi on amorphous Si film 6.

り接触する電極7及びP j tf電極に接続される電
極8を形成する。
An electrode 7 and an electrode 8 connected to the P j tf electrode are formed in contact with each other.

本実施例においては、非晶:af(Si皮膜6はシラン
(SiH4)のグロー放電分解法によって厚さ07〔μ
m〕程度に形成してバターニングを行ない、電極7及び
電極8はAtを用いて形成している。
In this example, the amorphous: af (Si film 6 was formed to a thickness of 07 μm by glow discharge decomposition of silane (SiH4).
m] and patterning is performed, and the electrodes 7 and 8 are formed using At.

以上説明した実施例においては、整流性接触電極材料と
基板との間の密着性を確保するだめの中間層としてTi
皮膜3を挿入しているが、この中間層はTjに限られる
ものではなく、例えばタンタル(’I’a)、=オビウ
ム(Nb)、モリブデン(Mo)もしくはタングステン
(W)を単一金属で、もしくはこれらの合金によって、
更にこれらの金属とアルミニウム(At)との合金、も
しくはこれらの金属とシリコン(Si )との合金もし
くは化合物を用いて本発明を実施することができる。
In the embodiments described above, Ti is used as an intermediate layer to ensure adhesion between the rectifying contact electrode material and the substrate.
Although the film 3 is inserted, this intermediate layer is not limited to Tj, but can be made of a single metal such as tantalum ('I'a), obsium (Nb), molybdenum (Mo), or tungsten (W). , or by these alloys,
Furthermore, the present invention can be carried out using alloys of these metals and aluminum (At), or alloys or compounds of these metals and silicon (Si).

Ti、Ta等の前記金属皮膜を介することによって、p
t 、 Pd等のSlと整流性接触を形成する金属皮膜
がガラス質基板に対して密着性良く安定して形成される
。またTi、Ta等の前記の皮膜形成性金属あるいは弁
作用金属として知られている金属は、陽極酸化法等によ
って技術的に選定された厚さにその酸化物を形成するこ
とができ、形成された酸化物は化学的、物理的に安定性
が優れており、洩れ電流の少ない良好ガ絶縁材料である
。従って本発明のダイオード素子の電圧−電流特性に関
しては、Ti等の皮膜3I″i、影響を及すことなく、
pt等の整流性接触電極の特性が完全に発揮される。
By passing the metal film such as Ti or Ta, p
A metal film such as Pd or Pd that forms a rectifying contact with Sl is stably formed with good adhesion to the glass substrate. Furthermore, the metals known as film-forming metals or valve metals, such as Ti and Ta, can form their oxides to a technically selected thickness by anodizing or the like. This oxide has excellent chemical and physical stability and is a good insulating material with low leakage current. Therefore, regarding the voltage-current characteristics of the diode element of the present invention, the film 3I''i of Ti etc. does not have any influence.
The characteristics of rectifying contact electrodes such as PT are fully exhibited.

1g)  発明の詳細 な説明した如く本発明によれば、絶縁性基板上に形成さ
れる膜ダイオード素子を、整流性接触をなす電極を基板
側としても、最適の電気的特性が得られる材料の組合せ
を選択して充分にその効果を発揮することができ、かつ
良好な信頼性を確保することが可能であって、ダイオー
ド素子を含む抜合回路等を最適な構造と製造工程によっ
て実現することができる。
1g) As described in detail, according to the present invention, a membrane diode element formed on an insulating substrate is made of a material that can provide optimal electrical characteristics even when the electrode that makes rectifying contact is on the substrate side. It is possible to select a combination to sufficiently exhibit its effect, and to ensure good reliability, and to realize a selection circuit including a diode element using an optimal structure and manufacturing process. Can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第J1シ1乃至第3図は本発明の実施例の主要製造工程
における状態を示す断面図である。 図において、1はガラス基板、3はTi皮膜、4はpt
皮l1隻、5はTi酸化膜、6社非晶質Si膜、7及び
8はAL電極を示す。
FIGS. 1 to 3 of J1 are sectional views showing the main manufacturing steps of the embodiment of the present invention. In the figure, 1 is a glass substrate, 3 is a Ti film, and 4 is a PT
5 is a Ti oxide film, 6 is an amorphous Si film, and 7 and 8 are AL electrodes.

Claims (1)

【特許請求の範囲】 該第2の金属皮膜に接する半導体皮膜と、該半導体皮膜
に接する第3の金属皮膜とを備えて、前記半導体皮膜と
前記第2の金属皮膜とは整流性接触を、前記半導体皮膜
と前記第3の金属皮膜とはオーミック接触を形成し、か
つ、前記半導体皮膜と前記第1の金属皮膜とは、該第1
の金属皮膜を形成する金属の酸化膜を介して接してなる
ことを特徴とするダイオード素子。 (2)前記第1の金属皮膜が、チタン、タンタル。 ニオビウム、モリブデンもしくはタングステンのうち少
くとも一神の金属、又は前記金属とアルミニウムもしく
はシリコンとの合金もしくは化合物によって形成さt゛
ビCることを特徴とする特許請求の範囲第1項記載のダ
イオード素子。
[Scope of Claims] A semiconductor film in contact with the second metal film, and a third metal film in contact with the semiconductor film, wherein the semiconductor film and the second metal film are in rectifying contact, The semiconductor film and the third metal film form an ohmic contact, and the semiconductor film and the first metal film form an ohmic contact with each other.
A diode element, characterized in that the diode element is made of a metal film in contact with a metal oxide film forming a metal film. (2) The first metal film is titanium or tantalum. The diode element according to claim 1, characterized in that the diode element is formed of at least one metal selected from niobium, molybdenum, and tungsten, or an alloy or compound of said metal and aluminum or silicon. .
JP58032139A 1983-02-28 1983-02-28 Diode element Pending JPS59158569A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58032139A JPS59158569A (en) 1983-02-28 1983-02-28 Diode element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58032139A JPS59158569A (en) 1983-02-28 1983-02-28 Diode element

Publications (1)

Publication Number Publication Date
JPS59158569A true JPS59158569A (en) 1984-09-08

Family

ID=12350560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58032139A Pending JPS59158569A (en) 1983-02-28 1983-02-28 Diode element

Country Status (1)

Country Link
JP (1) JPS59158569A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1049150A1 (en) * 1999-04-26 2000-11-02 Agilent Technologies Inc. Method and structure for bonding layers in a semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1049150A1 (en) * 1999-04-26 2000-11-02 Agilent Technologies Inc. Method and structure for bonding layers in a semiconductor device
US6387736B1 (en) 1999-04-26 2002-05-14 Agilent Technologies, Inc. Method and structure for bonding layers in a semiconductor device

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