JPS59114651A - Debug system - Google Patents
Debug systemInfo
- Publication number
- JPS59114651A JPS59114651A JP57224727A JP22472782A JPS59114651A JP S59114651 A JPS59114651 A JP S59114651A JP 57224727 A JP57224727 A JP 57224727A JP 22472782 A JP22472782 A JP 22472782A JP S59114651 A JPS59114651 A JP S59114651A
- Authority
- JP
- Japan
- Prior art keywords
- common bus
- processing
- bus
- debugging
- processing device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はデバッグ方式、特に複数の遠隔地からデバッグ
センタの処理システムを使用してオンラインデバッグを
実行するデバッグ方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a debugging method, and more particularly to a debugging method that performs online debugging from multiple remote locations using a processing system of a debug center.
従来のデバッグ方式は、実稼働と同一構成の処理システ
ムにおいてこの処理システムに含まれる処理装置に接続
された試験台からデバッグを実行する。一般に処理シス
テムは複数のサブシステムを共通バスで接続し中央処理
装置がこの共通バスを介して機能動作を制御する。この
共通バスは高速且つ多量の情報処理のため複数の情報伝
送路を持つ並列処理方式であシ、同様の理由で中央処理
装置と試験台との間も多数のデータ線及び制御線を有す
る試験線で結ばれるので、試験台、中央処理装置又はこ
れらの両者を処理システムの本体から離して設置するこ
とが困難である。In the conventional debugging method, debugging is performed in a processing system having the same configuration as that used in actual operation from a test stand connected to a processing device included in the processing system. Generally, a processing system connects a plurality of subsystems through a common bus, and a central processing unit controls functional operations via the common bus. This common bus is a parallel processing method that has multiple information transmission lines in order to process high-speed and large amounts of information, and for the same reason, tests have many data lines and control lines between the central processing unit and the test stand. Because of the wire connections, it is difficult to locate the test bench, central processing unit, or both away from the main body of the processing system.
第１図は従来のデバッグ方式の一構成例を示す機能ブロ
ック図である。電話交換システム１０は電話加入者回線
１１に電話機が、又中継線１２の先に別の交換システム
が、接続される通話路サブシステム１０１及び呼処理装
置（以下ＣＰ）１０２を含む制御サブシステム１０３並
びにこれら両者が接続された共通バス１０４を備え、前
記ＣＰ１０２が共通バス１０４を介して各サブシステム
を制御し交換接続動作を実行する。デバッグのために１
ｌ−１，Ｃｒ２Ｏ２に接続された試験台（以下ＴＮＴ）
１３が使用され、Ｃｒ２Ｏ２を直接制御する。このＴＳ
Ｔ１３は机上の専用台、又は汎用パーソナルコンピュー
タの活用ができるが、Ｃｒ２Ｏ２に複数の試験糾を持ち
一対一に直結されるため、Ｃｒ２Ｏ２に近接して設備さ
れる。又、Ｃｒ２Ｏ２は交換システムｌＯの内部にある
共通バス１０４を介して各装置を制御するが、複数のＣ
ｒ２Ｏ２による処理能力の向上又このための高速処理等
の理由から共通バス１０４に複数の情報伝送路を有する
並列処理方式を採用しているので、共通バス１０４の延
長は困難である。FIG. 1 is a functional block diagram showing a configuration example of a conventional debugging method. The telephone switching system 10 includes a control subsystem 103 that includes a communication path subsystem 101 and a call processing device (hereinafter referred to as CP) 102 to which a telephone is connected to a telephone subscriber line 11 and another switching system is connected to a trunk line 12. In addition, a common bus 104 is provided to which both these systems are connected, and the CP 102 controls each subsystem via the common bus 104 and executes exchange connection operations. 1 for debugging
Test stand (hereinafter referred to as TNT) connected to l-1, Cr2O2
13 is used to directly control Cr2O2. This TS
Although T13 can be used as a dedicated stand on a desk or as a general-purpose personal computer, it is installed close to Cr2O2 because it has multiple test results and is directly connected to Cr2O2. Furthermore, although Cr2O2 controls each device via a common bus 104 inside the exchange system IO, multiple C
Since a parallel processing system in which the common bus 104 has a plurality of information transmission paths is adopted for reasons such as improved processing capacity by r2O2 and high-speed processing for this purpose, it is difficult to extend the common bus 104.
しかるに近年、ソフトウェアの生産性、保守性の向上が
叫ばれプログラムの実装置によるデバッグの効率性に着
目して、多くのプログラマが実装置本体から離れた場所
例えば自己の机上から、作成したプログラムを何時でも
オンラインデバッグできることを望むようになった。However, in recent years, there has been a call for improvements in software productivity and maintainability, and many programmers have focused on the efficiency of debugging programs using real equipment. I've come to want to be able to debug online anytime.
従来のデバッグ方式は、試験台（デバッグ・検ソフトウ
ェアの生産性、保守性の向上を阻害するという欠点を持
っている。Conventional debugging methods have the disadvantage of hindering improvements in the productivity and maintainability of test stands (debugging and inspection software).
本発明の目的は処理システムの共通バスと処理装置との
間に通信用データ伝送手段を設は処理装置と入出力端末
装置とをプログラマに近接して設置することによりソフ
トウェアの生産性向上が得られるデバッグ方式を提供す
ることにある。An object of the present invention is to provide communication data transmission means between a common bus of a processing system and a processing device, and to improve software productivity by installing the processing device and input/output terminal device close to a programmer. The objective is to provide a debugging method that can be used.
本発明によるデバッグ方式は、複数のサブシステムを接
続した共通バスと、該共通バスに接続し且つデバッグ用
入出力端末装置と接続された少くとも一つの処理装置と
を含みオンライン実時間処理を行う処理システムのデバ
ッグ方式において、前記共通バスと前記処理装置との間
に、該処理装置と同じ条件で前記共通バスに相互接続し
た第１の変換手段と、前記共通バスと同じ条件で前記処
理装置の少くとも一つのそれぞれに相互接続した第２の
変換手段と、且つ前記第１及び第２の変換手段を接続し
て相互に離れて位置する前記共通バスと前記処理装置と
の間に情報の授受を実現するデータ伝送手段とを備え、
少くとも一つの前記処理装置を前記処理システムの本体
と離して設置したことを特徴とする。The debugging method according to the present invention includes a common bus connecting a plurality of subsystems, and at least one processing device connected to the common bus and connected to a debugging input/output terminal device, and performs online real-time processing. In a debugging method for a processing system, a first conversion means interconnected to the common bus under the same conditions as the processing device is provided between the common bus and the processing device; and a second converting means interconnected to at least one of the first and second converting means, and between the common bus connecting the first and second converting means and located apart from each other, and the processing device. Equipped with a data transmission means to realize sending and receiving,
The present invention is characterized in that at least one of the processing devices is installed apart from the main body of the processing system.
次に本発明につき図面を参照して説明する。第２図は本
発明のデバッグ方式の一実施例を示す機能ブロック図で
ある。第２図において、第１図と同一構成要素には同一
番号符号が付与されている。Next, the present invention will be explained with reference to the drawings. FIG. 2 is a functional block diagram showing an embodiment of the debugging method of the present invention. In FIG. 2, the same components as in FIG. 1 are given the same numbers and symbols.
交換システム２０は電話加入者回線１１及び中継線を接
続収容する通話路サブシステム１０１及び呼処理装置（
以下ＣＰ）１０２を含む制御サブシステム２０３並びに
これら二つのサブシステムが接続される共通バス１０４
を備え、前記ＣＰ１０２が共通バス１０４を介して交換
接続動作を制御する。制御サブシステム２０３の変換装
置（以下ＡＤＡ）２０２は、一方で共通バス１０４とＣ
Ｐ １０２との間の接続条件によシ共通バス１０４と接
続し他方で光バスシステム（通信用大量データ伝送手段
）２５に対し所定の接続条件で端局装置（以下ＴＳ）２
５１と接続する。又、ＣＰ２４２は前記ＣＰ１０２ と
同一構成要素のもので、且つ交換システム２ｏから遠隔
の地に設置された端末システム２４に含まれる。この端
末システム２４に含まれる変換装置（以下ＡＤＢ）２４
４は一方で光バスシステム２５の接続条件によってＴ８
２５２に接続され、他方で共通バス１０４とＣｒ２Ｏ２
との間の接続条件によ、９ＣＰ２４２と接続する。これ
らＴＳ２５１及び２５２は光パス２５０ Ｋ接続されて
おシ、時分割多重の直列符号伝送方式による光通信が遠
隔地に対して可能である。従来技術同様ＣＰ２４２はＴ
ｆ９Ｔ１３と同一構成要素の試験台（以下ＴＮＴ）２４
３と直結されるので、ＴＳＴ２４３は’Ｉ’５Ｔ１３と
同一操作で交換システム２ｏを使用したデバッグが実行
できる。このように、光バスシステムは光バスに多数の
端局装置（ＴＳ）を設置することＫよシ多数の試験台（
ＴＮＴ）がら任意の時間に交換システムを使用してデバ
ッグを実行することを可能にする。The switching system 20 includes a communication channel subsystem 101 that connects and accommodates telephone subscriber lines 11 and trunk lines, and a call processing device (
A control subsystem 203 including a control subsystem 102 (hereinafter referred to as CP) and a common bus 104 to which these two subsystems are connected.
The CP 102 controls switching connection operations via a common bus 104. A conversion device (hereinafter referred to as ADA) 202 of the control subsystem 203 connects the common bus 104 and C
The terminal station (hereinafter referred to as TS) 2 is connected to the common bus 104 according to the connection conditions with P 102, and the terminal station device (hereinafter referred to as TS) 2 is connected to the optical bus system (mass data transmission means for communication) 25 under predetermined connection conditions.
Connect with 51. Further, the CP 242 has the same components as the CP 102, and is included in the terminal system 24 installed at a remote location from the exchange system 2o. Conversion device (hereinafter referred to as ADB) 24 included in this terminal system 24
4, on the other hand, T8 depending on the connection conditions of the optical bus system 25.
252 and the common bus 104 and Cr2O2 on the other hand.
According to the connection conditions between 9CP242 and 9CP242. These TSs 251 and 252 are connected by an optical path 250K, allowing optical communication to remote locations using a time division multiplexed serial code transmission method. Similar to the conventional technology, CP242 is T
Test stand (hereinafter referred to as TNT) 24 with the same components as f9T13
Since the TST 243 is directly connected to the switching system 2o, the TST 243 can perform debugging using the exchange system 2o in the same manner as the 'I'5T13. In this way, the optical bus system does not require the installation of many terminal stations (TS) on the optical bus, but also the installation of many test stands (TS) on the optical bus.
TNT) allows you to perform debugging using the exchange system at any time.
次に第３図は第２図における共通バス、呼処理１ｔ（Ｃ
Ｐ）、 光バスシステム、並に変換装置（ＡＤＡ及びＡ
ＤＢ）の間の情報交換の関係を示す機能ブロック図であ
る。呼処理装置（以下ＣＰ）１０２ は共通バス１０４
と前記従来技術で説明したように並列処理方式に従って
情報１ｌｉｋＩ３２２によ多接続されデータ入力用バッ
ファレジスタ（以下Ｂ几Ｉ）１０２１゜データ出力用バ
ッファレジスタ（以下ＢＲＯ）１０２２１主記憶装置（
以下ＭＭ）１０２３及びこれらを制御する中央処理装置
（以下ＣＰＵ）１０２４を含み交換システムを制御する
。次にＣＰ２４２は前記ＣＰ１０２と同一構成で、ＢＲ
Ｉ２４２１、ＢＲＯ２４２２、ＭＭ２４２３及びＣＰＵ
２４２４を備え、情報線３４−変換装置（以下ＡＤＢ）
２４４１報線３３２−光パスジステム２５−情報線３３
１−変換装置（以下ＡＤＡ）２０２−情報＃３２１を経
由して共通バス１０４に接続される。Next, FIG. 3 shows the common bus and call processing 1t (C
P), optical bus systems and converters (ADA and A
FIG. 2 is a functional block diagram showing the relationship of information exchange between DBs. A call processing device (hereinafter referred to as CP) 102 is connected to a common bus 104
As explained in the prior art section, the data input buffer register (hereinafter referred to as BRO) 1021 and the data output buffer register (hereinafter referred to as BRO) 10221 are connected to the information 1likI 322 according to the parallel processing method.
It controls the exchange system, including a central processing unit (hereinafter referred to as MM) 1023 and a central processing unit (hereinafter referred to as CPU) 1024 that controls these. Next, the CP242 has the same configuration as the CP102, and the BR
I2421, BRO2422, MM2423 and CPU
2424, information line 34-conversion device (hereinafter referred to as ADB)
2441 information line 332-optical path system 25-information line 33
1 - Conversion device (hereinafter referred to as ADA) 202 - Connected to the common bus 104 via information #321.
この接続において情報線３４及び３２１を直結するとき
は情報線３２２と同一条件を成し、共通バス１０４及び
ＣＰ２４２の間の情報の授受は中間装置の転送処理時間
による遅延を生じる以外前記共通バス１０４及びＣｒ２
Ｏ２間と同一の接続条件となる１゜ＡＤＡ ２０２は、
ＣＰ２４２への入力データを一時蓄積するレジスタ（以
下ＩＲＡ）２０２１、出力データを一時蓄積するレジス
タ（以下０ＲＡ）２０２２．及び前記入力データを共通
バス１０４から又出力データを光バスシステム２５から
受付けＩＲＡ２０２１又は０ＲＡ２０２２に一時蓄積す
るのを制御し且つＩＲＡ２０２１から光バスシステム２
５に又０ＲＡ２０２２から共通バス１０４に条件を合わ
せたデータを出力する制御部（以下ＣＣＡ）２０２３を
備える。一方、ＡＤＢ２４４はＡＤＡ２０２ と同様の
構成で入力データレジスタ（以下ＩＲＢ）２４４１．出
力データレジスタ（以下ＯＲＢ ） ２４４２及び入力
データを光バスシステム２５から又出力データをＣＰ２
４２から受付けＩＲＢ２４４１又は０ＲＢ２４４２に一
時蓄積するのを制御し且つＩＲＢ２４４１からＣＰ２４
２に又０ＲＢ２４４２から光バスシステム２５に条件を
合わせたデータを出力する制御部（以下ＣＣＢ）２４４
３を備える。又一つのＡＤＡ２０２と複数のＡＤＢ２４
４，２４４’とは、光ノくスジステム２５を介して情報
線３３１及び情報線３３２ ３３２’のそれぞれによ多
接続され、ＡＤＢ２４４２４４１の遠隔地での設置が可
能である。ＣＰ２４２゜２４２１は情報線３４．３４’
によシＡＤＢ２４鳴、２４４１と接続され且つ試験台２
４３（第２図参照）と結線され、Ｃｒ２Ｏ２と同様にデ
バッグ用の交換システムが試験台からの要請に従ってデ
ノくラグのための処理を実行する。In this connection, when the information lines 34 and 321 are directly connected, the same conditions as the information line 322 are established, and the exchange of information between the common bus 104 and the CP 242 is performed using the common bus 104, except that there is a delay due to the transfer processing time of the intermediate device. and Cr2
1°ADA 202, which has the same connection conditions as between O2,
A register (hereinafter referred to as IRA) 2021 that temporarily stores input data to the CP 242, a register (hereinafter referred to as 0RA) 2022 that temporarily stores output data. and receives the input data from the common bus 104 and the output data from the optical bus system 25 and controls the temporary storage in the IRA 2021 or 0RA 2022, and controls the reception from the IRA 2021 to the optical bus system 2.
5 is also provided with a control unit (hereinafter referred to as CCA) 2023 that outputs data meeting conditions from the 0RA 2022 to the common bus 104. On the other hand, the ADB 244 has the same configuration as the ADA 202 and has input data registers (hereinafter referred to as IRBs) 2441. Output data register (hereinafter referred to as ORB) 2442 and input data from the optical bus system 25 and output data from the CP2
42 to the reception IRB 2441 or 0RB 2442, and from the IRB 2441 to the CP 24.
2, a control unit (hereinafter referred to as CCB) 244 outputs data matching the conditions from the 0RB 2442 to the optical bus system 25.
Equipped with 3. Another ADA202 and multiple ADB24
The ADB 2442441 is connected to the information line 331 and the information line 332 332' through the optical system 25, allowing the ADB 2442441 to be installed in a remote location. CP242°2421 is information line 34.34'
Connected to ADB 24, 2441 and test stand 2
43 (see FIG. 2), and similarly to Cr2O2, a debug exchange system executes processing for debugging according to requests from the test stand.
本実施例では電話交換システムとして説明したが、デー
タ交換システム又は一般の情報処理システムに置換して
もよく、光バスシステムはループの光フアイバケーブル
による光リンクシステム又は光フアイバケーブルに限定
せず通信用大量データ伝送システムであればよく、又試
験台は一般の入出力装置であれはデバッグ可能であシプ
ログラ−ｆ （７）机上のパーソナルコンピュータの利
用は最も効果を発揮する。Although this embodiment has been explained as a telephone exchange system, it may be replaced with a data exchange system or a general information processing system, and the optical bus system is not limited to an optical link system using a loop optical fiber cable or an optical fiber cable, and communication (7) The use of a personal computer on a desk is most effective.
以上説明したように本発明によれば共通バスと処理装置
との間に変換装置を介して通信用データ伝送手段を設備
しデバッグ用入出力端末装置をプログラマに近接設置す
ることによシッフトウエアの生産性向上という効果が得
られる。As explained above, according to the present invention, a data transmission means for communication is installed between a common bus and a processing device via a conversion device, and a debugging input/output terminal device is installed close to a programmer, so that shiftware can be improved. The effect of improving productivity can be obtained.
第１図は従来のデバッグ方式の一構成例を示す機能ブロ
ック図、第２図は本発明によるデノくラグ方式の一実施
例を示す機能ブロック図、第３図は第２図における処理
装置及び変換装置の主機能ブロックを示すと共に接続状
況を示す機能ブロック図である。
１３ ２４３・・・・・・試験台（入出力端末装置）、
１０゜２０・・・・・・交換システム（処理システム）
、２５・・・・・・光バスシステム（畏距量帯大会デー
タ伝送手段）、１０１・・・・・・通話路サブシステム
、１０２．２４２．２４２’・・・・・・呼処理装置（
処理装置）、１０３，２０３・・・・・・制御サブシス
テム、１０４・・・・・・共通バス、２０２，２４４、
。
２４４１・・・・・・変換装置。FIG. 1 is a functional block diagram showing an example of a configuration of a conventional debugging method, FIG. 2 is a functional block diagram showing an example of a debugging method according to the present invention, and FIG. 3 is a processing device in FIG. 2. FIG. 2 is a functional block diagram showing the main functional blocks of the conversion device and the connection status. 13 243...Test bench (input/output terminal device),
10゜20・・・Exchange system (processing system)
, 25... Optical bus system (distance band meeting data transmission means), 101... Call path subsystem, 102.242.242'... Call processing device (
processing device), 103, 203... control subsystem, 104... common bus, 202, 244,
. 2441... Conversion device.
Claims (1)
に接続し且つデバッグ用入出力端末装置と接続された少
くとも一つの処理装置とを含みオンライン実時間処理を
行う処理システムのデバッグ方式において、前記共通バ
スと前記処理装置との間に、該処理装置と同じ条件で前
記共通バスに相互接続した第１の変換手段と、前記共通
バスと同じ条件で前記処理装置の少くとも一つのそれぞ
れに相互接続した第２の変換手段と、且つ前記第１及び
第２の変換手段を接続して相互に離れて位置する前記共
通バスと前記処理装置との間に情報の授受を実現するデ
ータ伝送手段とを備え、少くとも一つの前記処理装置を
前記処理システムの本体と離して設置したことを特徴と
するデバッグ方式。A debugging method for a processing system that performs online real-time processing, including a common bus connecting a plurality of subsystems, and at least one processing device connected to the common bus and connected to a debugging input/output terminal device, between said common bus and said processing device, first conversion means interconnected to said common bus under the same conditions as said processing device; and first conversion means interconnected to said common bus under the same conditions as said common bus; data transmission means for realizing exchange of information between the mutually connected second conversion means and the common bus and the processing device that connect the first and second conversion means and are located apart from each other; A debugging method, characterized in that at least one of the processing devices is installed separately from a main body of the processing system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57224727A JPS59114651A (en) | 1982-12-21 | 1982-12-21 | Debug system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57224727A JPS59114651A (en) | 1982-12-21 | 1982-12-21 | Debug system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59114651A true JPS59114651A (en) | 1984-07-02 |
Family
ID=16818292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57224727A Pending JPS59114651A (en) | 1982-12-21 | 1982-12-21 | Debug system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59114651A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6454545A (en) * | 1987-08-25 | 1989-03-02 | Nec Corp | Remote debug device |
| JPH01136436A (en) * | 1987-11-24 | 1989-05-29 | Mitsubishi Electric Corp | Empty vehicle call system |
| JPH01160293A (en) * | 1987-12-17 | 1989-06-23 | Nec Corp | Software development aid system for exchange |
-
1982
- 1982-12-21 JP JP57224727A patent/JPS59114651A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6454545A (en) * | 1987-08-25 | 1989-03-02 | Nec Corp | Remote debug device |
| JPH01136436A (en) * | 1987-11-24 | 1989-05-29 | Mitsubishi Electric Corp | Empty vehicle call system |
| JPH01160293A (en) * | 1987-12-17 | 1989-06-23 | Nec Corp | Software development aid system for exchange |
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