JPS59112787A - Color framing device of video tape device - Google Patents

Abstract

PURPOSE:To simplify the constitution of color framing by inserting a reference video signal into a reproduced component video signal. CONSTITUTION:The reproduced component video signal CV is inserted into the reference video signal RV which arrives externally to send out a composite video signal COV. When a frame locking circuit enters a frame locking state, that is detected by the frame locking detecting circuit 23 of a color frame lock circuit 22 to perform switching to a reproduction mode, and a color frame unlocking detecting circuit 25 is preset by its detection signal FL. When each pulse of a reference color frame signal RCF is generated in the phase lock state, the color frame unlocking detection circuit 25 is set while a reproduced color frame signal OCF obtained on the basis of a reproduced time code signal has logic H, so that a delay circuit 30 is prevented from being triggered.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a color framing device for a video tape device, and is particularly applicable to a video playback device that reproduces a video signal recorded as a component on a tape to obtain a composite video signal. It is suitable for this purpose.

[Background technology and its problems]

As shown in Fig. 1, this type of video playback device (1) uses a luminance signal (Y signal) and color signals (L-Y signal, B-Y signal) of a composite video signal for one field. Separate the components and record them on j-th separate tracks, and when playing back each component video signal C.
V is played back from the tape and inserted into the reference video Shingetsu RV in the encoder (2) to generate a composite video signal C.
There are some that are sent as OV. Here, the reference video signal RV is a so-called digital burst signal having a signal format similar to that of a normal composite video signal by removing the Y signal, R-Y signal, and B-Y @ signal and leaving a synchronization signal and a color burst signal. This reference video signal is used to achieve intra-office synchronization between the video reproducing device (1) and other devices within the same station.

By the way, in general, each color burst signal included in a composite video signal has a phase that sequentially changes by a predetermined amount at the start of the rise in relation to the horizontal synchronization frequency. For example, in the case of the NTSC system (and SECAM system), there are 4 fields. The same mode is repeated every other time. Therefore, in order to express the difference between the modes, when recording a component video signal on a tape by considering the video signal portion of four consecutive fields as one color frame, it is necessary to record the component video signal of the first and second fields as one color frame. For example, if you record with an even numbered time code and record the third and fourth field component video signals with odd numbered time codes, you can specify the desired time code during playback. By doing so, it is possible to reproduce a component video signal in a desired color mode.

However, in practice, when trying to obtain a composite video signal by playing back a tape on which component video signals with such time codes have been recorded, the playback signal corresponding to the color frame that occurs every 4 fields at t6 is added to the reference video signal. It is necessary to insert a component video signal (this is called color framing).

[Purpose of the invention]

The present invention has been made in consideration of the above points, and aims to realize color framing with a relatively simple configuration.

[Summary of the invention]

In order to achieve such an object, the present invention obtains a reproduced colorverse signal based on the regularity of the time code attached to the reproduced component video signal, and generates a reference color frame signal which is synchronized with the color frame of the reference video signal. Based on the comparison result, the reproduced component video signal is made to match the reference video signal in color frame length.

〔Example〕

An embodiment in which the present invention is applied to an NTSC video tape recorder (VTR) will be described below in detail with reference to the drawings. In Figure 2, (1 is a video tape recorder for playback (
The component video signal cv (
y signal, R-Y signal, B-Y signal), and has an encoder (12) that receives a reference video signal R arriving from the outside.
A reproduced component video signal C■ is inserted into V, and a composite video signal CO■ is sent out.

Here, a frame lock circuit (1
3) is provided. The frame lock circuit (13) is a reproduction control pulse signal CT that is reproduced from the tape.
L (approximately 3Cj (Hz)) is delayed by delay circuits (14) and (15) as necessary and provided as a comparison input to a phase-frequency detection circuit (16). This phase-frequency detection circuit (16) has a reference frame signal RF extracted from the reference video signal R in the frame signal separation circuit (17) as a reference input.
z]) is provided through the OR circuit (18).

The phase-frequency detection circuit (16) generates a drive output MP that cancels out the phase difference and frequency difference between the comparison input and the reference input if there is one, and converts this drive output MP into DC through the loop filter (19). After conversion, it is applied to the capstan motor of the VTR via the drive amplifier circuit (20),
As a result, the reproduced component video signal CV corresponding to each frame recorded on the tape is reproduced while maintaining the frame-locked state with respect to the reference video signal RV together with its time suit. In this way, the phase −
The frequency detection circuit (16), the loop filter (19) and the drive amplifier circuit (2o) constitute a frame-locked loop (21), and the phase-frequency detection circuit (16)
Fairchild, Inc., IC11C44 can be applied.

When the cono frame lock circuit (13) enters the frame lock state, the frame lock detection circuit (23) included in the color frame lock circuit (22) detects this. The frame lock detection circuit (23) is composed of a D flip-flop circuit, and receives at its D input terminal the reproduction control pulse signal CTL obtained from the delay circuit (14), and at its clock input terminal receives the reproduction control pulse signal CTL obtained from the frame signal separation circuit (17). The clear signal terminal CLR receives a reproduction mode signal PL via an inverter (24). Thus, when the VTR is switched to the playback mode and the playback mode signal PL becomes logical, the frame lock detection circuit (23) is cleared, and when the timing of the playback control pulse signal CTL matches the timing of the reference frame signal RF for the first time thereafter. The frame lock detection circuit (23) is set and sends a frame lock detection signal FL of logic 2 from the Q output terminal to the color frame non-lock detection circuit (25).

The color frame non-lock detection circuit (25) reads the reproduction time code signal OTC reproduced from the tape (25).
6) When the time code attached to the currently reproduced component video signal CV is an even number (
From its regularity, it becomes a logical IHJ (meaning that it is reproducing the first and second fields of the color frame),
And when the time code is an odd number (which means that the third and fourth fields of the color frame are being reproduced due to its regularity), the reproduced color frame signal O becomes "between logics".
CF is applied to the D input terminal of the color frame unlock detection circuit (25) through a delay circuit (27) as required. The color frame non-lock detection circuit (25) is a D flip-flop circuit, which receives the frame lock detection signal FL at its preset input terminal PR, and receives the reference video signal FL from the color frame signal separation circuit (28) at its clock input terminal. Reference color frame signals R, CF extracted from the R, CF are given.

Here, the reference color frame signal RCF is a pulse signal with a 4-field interval, and when the frame lock detection signal FL becomes logically the same (that is, it means that the frame is in a locked state), the color frame non-lock detection circuit When () is preset, when the pulse of the reference color frame signal RCF arrives at the timing of the section of the reproduced color frame signal OCF of logic 1 (meaning that the color frame is not locked), the color frame The non-lock detection circuit (25) sends the non-lock detection signal NL of logic 1 from the Q output terminal to the delay circuit (3
0). By the way, the reference color frame signal RCF
If the content of the reproduced time code signal OTC is an odd number when the time code signal OTC arrives, the reproduced color frame is not correctly locked, so that a non-lock detection signal NL between logics is obtained.

The delay circuit (30) is a monomultipipe rake that receives the non-lock detection signal NL as an inhibition release signal, and when the non-lock detection signal NL becomes logic f'LJ, it outputs the reference frame signal of the frame signal separation circuit (17). It is triggered by RF, and after a delay time, the pulse generating circuit (31) is triggered by lowering the Q output to a logic level. The pulse generating circuit (31) is a mono multi-pipe rake, and generates a pulse of a predetermined width on the condition that the confirmation condition signal KN given from the AND circuit (32) is logically the same, and sends this as a frame lock release pulse signal MBP. It is applied as a comparison input to the phase-frequency detection circuit (16) via the OR circuit (18) of the frame lock circuit (13).

AND circuit (32) is a color frame enable signal C
FE (given from the mode selection switch) and the time code detection signal TCD obtained in the time code detection circuit (33), thereby indicating that the color frame operation mode is selected and the time code signal OT.
The arrival of C is confirmed.

The Quimcode signal OTC reproduced from the tape in the VTR (11) is sent out together with the composite toy No. 8 COV via the buffer circuit (34).

In the configuration shown in FIG. 2, when the reproduction mode is entered and the reproduction mode signal PL becomes logical, if the reproduction control pulse signal CTL is not phase-locked to the reference frame signal 'RF, the phase of the frame lock circuit (13) is changed. −
A frequency detection circuit (16) detects the frequency and controls the speed of the capstan motor to achieve a phase lock state. This phase locking is detected by the frame lock detection circuit (23), and the color frame non-lock detection circuit (25) is preset by the detection signal FL.

In this phase-locked state, the reference color frame (i-
When each pulse of 1 cF is generated at an interval of 4 fields, the reproduced color frame signal OCF obtained based on the reproduced time code signal OTe is logical 1) IJ (first
and (indicating that the component video signal of the second field is being reproduced), the color frame non-lock detection circuit (25) of the color frame lock circuit (22) is set, and thus the delay circuit (30) is set. The pulse generation circuit (
31) does not provide the unlock pulse signal BP to the phase-frequency detection circuit (16) of the frame lock circuit (13).

At this time, when each pulse of the reproduction control pulse signal CTL alternately reproduces the first field and the third field as shown in FIG.
As shown in A), a stable state is reached in which the phase is locked to the pulses of the first and third fields of the reference frame signal RF.

On the other hand, when a frame lock state is obtained by the frame lock circuit (13) and the color frame non-lock detection circuit (25) is preset, the pulse of the reference color frame signal RCF becomes the reproduced color frame signal O.
If it occurs in the logic 1 section of CF (representing that the component video signal CV of the third and fourth fields is being reproduced), the color frame non-lock detection circuit (
The detection signal NL of 25) is between logics. Therefore, the pulse of the reference frame signal RF that arrives thereafter is transmitted to the delay circuit (30
) and then trigger the pulse generation circuit (31).

Therefore, the lock release pulse signal BP is applied from the pulse generation circuit (31) to the phase-frequency detection circuit (16) of the frame lock circuit (13).

As a result, this lock release pulse signal BP is as shown in FIG. 4(A).
As shown in FIG. 2, the signal is inserted between the pulses of the reference frame signal ratio F given from the reference frame separation circuit (17). At this time, the phase-frequency detection circuit (16)
uses the inserted lock release pulse signal BP as a reference signal to detect the phase difference and frequency difference with the subsequent pulse of the reproduction control signal CTL as shown by the arrow in FIG. 4(B), and eliminates this difference. Increase the rotation speed of the capstan motor. Therefore, the frame lock state in the frame lock circuit (13) is released, the tape feeding speed is increased, and the pulse interval of the reproduction control pulse signal CTL is also narrowed.

This state continues until the pulse timing of the reference frame signal RF and the reproduction control pulse signal CTL match in the phase-frequency detection circuit (16). When this coincidence is eventually obtained, the frame lock circuit (13) becomes locked again. At this time, the locking of the reproduction control pulse signal CTL means that the reproduction control pulse signal CTL has slipped by one frame, and thus, as shown in FIG.
and (B) mean that the above-mentioned stable state has been entered.

When the frame lock is released by sending out the lock release pulse signal BP in this way, the frame lock detection circuit (23) sends the color frame non-lock detection circuit (23) to the color frame non-lock detection circuit (23).
Since the preset signal FL for 25) is not applied, the delay circuit (30) is not triggered and hence no unlock pulse signal BP is sent out until a permanent lock condition is obtained.

In this new lock state, the reproduced color frame signal OCF applied to the color frame unlock detection circuit (5) is set to logic "1" (component video of the first and second fields) at the timing of each pulse of the reference color frame signal RCF. Therefore, the color frame non-lock detection circuit (25) does not send out the detection signal NL between the logics.

In this way, the reproduced component video signal C■ can be correctly inserted into the predetermined color frame position of the reference video signal RV in the encoder (12), and (
Color frame lock can be achieved by

1g In the case mentioned above, the color frame signal separation circuit (28
), the reference video signal RV and the reference color frame signal RCF are separated, but instead, they may be separated from the composite video signal CO obtained at the output end of the encoder (12). Furthermore, the color frame signal separation circuit (28) is omitted and the field reference signal (reference video signal R) provided separately from the outside is provided.
A pulse indicating the start point of a color frame is generated every four fields of V) may be used as a reference signal for the color frame lock detection circuit (25).

Furthermore, in the above description, the phase-frequency detection of the frame lock circuit (13) is performed by generating a pulse BP for releasing the frame lock in the pulse generating circuit (31) based on the output of the color frame non-lock detection circuit (25). It was inserted into the reference signal for the circuit (16), but instead of this, the non-lock detection circuit (25) was inserted into the color frame.
) as the phase-frequency detection circuit (16) of the frame lock circuit (13) to reproduce the reproduced color frame signal OCF and the reference color frame signal RC.
It is also possible to obtain a correction output that eliminates the FO difference and feed it directly to the capstan motor.

Further, in the above description, an embodiment in which the present invention is applied to an NTSC system videotape apparatus has been described, but it can be similarly applied to a SECAM system. In addition, when applying to the PAL system, the following changes may be made. That is, the color frame of the reference video signal requires 8 fields, and therefore, as described in FIGS. 3 and 4, the reference frame signal RF and reproduction control pulse signal CTL are required.
When each pulse occurs, the corresponding field numbers are rlJ, r3J, r5J,
There will be 4 types of r7J. Accordingly, the relationship between the reference color frame signal RCF and the reproduced color frame signal OCF of the color frame non-lock detection circuit (25) changes from the simple in-phase or anti-phase mode as in the above case to the difference in field number. ga(ii)" (means the color frame is aligned), r2J
, r4J'.

A lock mode of ``6'' (or r-2J) can occur.

However, the essential operation in this case is the same as in the case of the above-mentioned NTSC system, and when the frame is locked in any lock mode, the color frame non-lock detection circuit (25) operates to check the lock phase of the color frame, and If not, a lock release pulse signal BP is generated to increase the speed of the capstan morph, and as a result, when the tape slips by one frame, the frame is locked again. From then on, check the lock phase of the color frame in the same way as in the above case,
If it does not match, release the frame lock and repeat the operation of slipping the tape (repeat up to 3 times).

In this way, even in the case of the PAL system, color frame locking can be reliably achieved in the same way as in the case described above.

〔Effect of the invention〕

As described above, according to the present invention, when inserting the reproduced component video signal obtained by reproducing from a component-recorded tape into the reference video signal, the time code of the reproduced component video signal is reliably added to the color frame in the reference video signal. A lockable color framing device can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining the videotape device;
FIG. 2 is a block diagram showing an embodiment of a color framing device for a videotape device according to the present invention, and FIGS. 3 and 4 are signal waveform diagrams for explaining its operation. (11)...playback video tape recorder, (12)...
...Encoder, (13)...Frame lock circuit,
(14), (15). (27)...delay circuit, (16)...phase-frequency detection circuit, (17)...frame signal separation circuit, (2
1)...Frame lock loop, (22)...Color frame lock circuit, (23)...Frame lock detection circuit, (25)...Color frame non-lock detection circuit, (26)... reading circuit, (28)... color frame signal separation circuit, (30)... delay circuit, (3
1)...Pulse generation circuit.

Claims (1)

[Claims] In a videotape device configured to obtain a composite video signal by inserting a reproduced component video signal reproduced from a component-recorded tape with no time code into a reference video signal, the reproduced component video signal is A reproduced color frame signal is obtained based on the regularity of the time code attached to the reference video signal, and this reproduced color frame signal is compared with a reference color frame signal generated in synchronization with the color frame of the reference video signal, and the comparison is made. A color framing device for a videotape device, comprising a color frame lock circuit for color frame locking the reproduced component video signal to the reference video signal based on the result.