JPS59107584A - Light-emitting diode - Google Patents
Light-emitting diodeInfo
- Publication number
- JPS59107584A JPS59107584A JP57216956A JP21695682A JPS59107584A JP S59107584 A JPS59107584 A JP S59107584A JP 57216956 A JP57216956 A JP 57216956A JP 21695682 A JP21695682 A JP 21695682A JP S59107584 A JPS59107584 A JP S59107584A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- sheet
- emitting diode
- foil
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011888 foil Substances 0.000 claims abstract description 30
- 239000013078 crystal Substances 0.000 claims abstract description 25
- 229920005989 resin Polymers 0.000 claims abstract description 16
- 239000011347 resin Substances 0.000 claims abstract description 16
- 239000004065 semiconductor Substances 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 12
- 239000000853 adhesive Substances 0.000 abstract description 8
- 230000001070 adhesive effect Effects 0.000 abstract description 8
- 229910052802 copper Inorganic materials 0.000 abstract description 4
- 239000010949 copper Substances 0.000 abstract description 4
- 238000005530 etching Methods 0.000 abstract description 2
- 238000004080 punching Methods 0.000 abstract description 2
- 238000007789 sealing Methods 0.000 abstract description 2
- 239000011889 copper foil Substances 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 7
- 125000006850 spacer group Chemical group 0.000 description 4
- 239000000945 filler Substances 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 239000010902 straw Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- NFLLKCVHYJRNRH-UHFFFAOYSA-N 8-chloro-1,3-dimethyl-7H-purine-2,6-dione 2-(diphenylmethyl)oxy-N,N-dimethylethanamine Chemical compound O=C1N(C)C(=O)N(C)C2=C1NC(Cl)=N2.C=1C=CC=CC=1C(OCCN(C)C)C1=CC=CC=C1 NFLLKCVHYJRNRH-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 1
- 235000011613 Pinus brutia Nutrition 0.000 description 1
- 241000018646 Pinus brutia Species 0.000 description 1
- 240000004808 Saccharomyces cerevisiae Species 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000008710 crystal-8 Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920006332 epoxy adhesive Polymers 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 210000004243 sweat Anatomy 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F13/00—Illuminated signs; Luminous advertising
- G09F13/20—Illuminated signs; Luminous advertising with luminescent surfaces or parts
- G09F13/22—Illuminated signs; Luminous advertising with luminescent surfaces or parts electroluminescent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Illuminated Signs And Luminous Advertising (AREA)
Abstract
Description
〔発明の技術分野〕
この発明は、発光ダイオードに関する。
〔発明の背景〕
従来、発光グイメートとしては、例えば第１図あるいは
、第２図に示すように構成さｔｌｔものが知らｈている
。
即ち、第１図に示された発光ダイオードは、１対のリー
ドフ[Technical Field of the Invention] This invention relates to light emitting diodes. [Background of the Invention] Conventionally, as a light-emitting device, a light emitting device configured as shown in FIG. 1 or 2, for example, is known. That is, the light emitting diode shown in FIG.
【／−ムであるアノード１とカソード２とを平行に
立設し、このカソード２の上端にＰ−Ｎ結晶体３を載置
して、Ｐ−Ｎ結晶体３のＮ型電極を上記カソード２に接
続し、甘な、Ｐ型電極をワイヤーボンデング４により、
上記アノード１に接続し、この後、とわらを樹脂５で略
円柱状に封止し、たものであり、一般に樹脂５の外径寸
法は約１〜２■程度になっている。しかし、このような
発光ダイオードにおいては、Ｐ−Ｎ結晶体３のＰ−Ｎ接
合面が樹脂５の外径に対し直交しているので、薄型化に
は、適さないという問題があった。
また、第２図に示さｔた発光グイメートは、アノード６
とカソード７を上下平行に配置し、これらの間に、Ｐ−
Ｎ結晶体８を配置して、Ｐ−Ｎ結晶体８の各電極を直接
的に上記アノード６及びカソード７に接続し、この後、
とわらを樹脂９でマツチ箱状に封止したものであり、こ
ｈら全体の厚さけ、約０．７〜０．９ｒｕｎ程度に形成
２台でいる。しかし、このような発光ダイオードにあっ
ては、Ｐ−Ｎ結晶体８の上下にアノード６及びカソード
７を釉層し、且つ、こわら全体を樹脂９で封止しなけｈ
ばならηいので、薄型化に限界があるという欠点があっ
た。
〔発明の目的〕
この発明け、上記のような＄情を背月になさｈたもので
、全体の厚さが極めて薄い発光ダイオードを提供するこ
とにある。
〔発明の要点〕
この発明は、上鍔【′のような目的を達成するために、
陽極電極及び陰極電極を有する半導体結晶体をシー）Ｋ
形成された貫通孔内に配置し、この半導体結晶体の一方
の電極を上記シートに積層さり。
て上記貫通孔と対応する箇所で２つに分割された導電箔
の一方に直接的に接続し、且つ他方の電極を上記導電箔
の他方にワイヤーボンデングによシ＃続し、上記シート
の貫通孔を樹脂封止したものである。
〔実施例〕
以下、この発明の一実施例を第３図ないし第９図に基づ
いて具体的に駁明する。
第３図は、この発明に係る発光ダイオードの製造過程を
示してネーリ、図中１０はポリイミド樹脂よりなるフィ
ルム状のシートである。この７−ト１０は１３図（Ａｌ
、（Ａ’）に示すように、長方形に形成されており、そ
の下面には接着剤１１が塗布さ力ている。この後、上記
シート１０は、第３図ｆ８１、（Ｂ′）に示すように、
打ち抜き加工さ引、その中央部に貫通孔１２が形成され
る。この場合、連通孔１２の大きさけ、デバイス（後述
するＰ−Ｎ結晶体１５）よυも犬きく形成さハている７
、この仮、上記シート１００下１ｎｉには、第３図（Ｃ
）、ＩＣ’）に示すように、上紀接矯剤１１を介して、
銅等よシなる導電箔１４が貼着さ力、且つラミネートさ
れる。この導電箔１４は、シート１０よυも長く形成さ
ｈ１シート１０の側方へ突出している。そして、上記導
電箔１４は、第３図（Ｄ）、（Ｂ′）に示すように、シ
ー）１００貫通孔１２に対応する箇所の中央部分がエツ
チングによシ取り除かｈ１左右２つに分割さハて、相互
に導通しないように々っている。このように、導電箔１
４が設けら力た上８［１シート］０のｐ通孔Ｊ２内には
、第３図（Ｅ）、（Ｂ′）に示すように、Ｐ−Ｎ結晶体
１５が配置される。このＰ−Ｎ結晶体１５け、第４図に
示すように、Ｎ型層１６上にＰ型層１７を形成し、この
Ｐ型層１７の上面両側に陽極電極１８．１８を設け、上
記Ｎ型Ｍ１６の下面に陰極電極１９を設けたものである
。ｆｆｌち、上鍔ｒ′Ｎ型層１６は、ガリウム・砒素ｆ
ＧａＡｓ ）基板にＮ型不純物を含むガリウム・アルミ
ニウム・砒素（Ｇａ’−χＡｔｘＡｓｌを除冷して成長
させたＮ型のエビタオシャル屑であり、贅た、上ｄ已Ｐ
型層１７は、上記Ｎ型層１６の？−面に鉛（Ｚｎ）を拡
散して得られた層でを・す、これらＮ型ｒｒＪ１６及び
Ｐ型層１７の間には、Ｐ−Ｎ接合面２０か形威さｉ９て
いる。なお、上記Ｎ型層１６のガリウム・砒素基板は取
シ除か力、Ｎ型、Ｐ型の各層１６．１７には、陽極′￥
ｍ＆１９及び陰極電極１８．１８が夫々蒸着さ力ている
。このよう゛に構成されたＰ−Ｎ結晶体１５は、第３図
（Ｅ）、（Ｅ勺に示すように、シート１０の貫通孔１２
内に配置されたときに、２つに分割された上記導電箔１
４の一方、つまり、同図中左側の導電箔１４ａに飽性さ
）１、こわにより、Ｎ型層１６の陰極電極１９が上記導
電箔１４ａに直接接触して接続さｈる。また、Ｐ型層１
７の陽極電極１８は、ワイヤー２１により、２つに分割
さｈた導電、箔１４の他方、つ才り、右側の導電箔１４
ｂにボンデングさかている。この後、第３１１Ｗｌ（Ｆ
ｌ、（Ｆ’）に示すように１、）言１−ＩＰ−Ｎ結晶体
１５が配置されたシート１０のμ通孔】２内に樹脂２２
を充填し７て、十Ｆ Ｐ ＬＮ結晶体１５を樹脂封止す
る。こねにより、全体のＪ？官が極めて薄い（約０．４
解程度）発光ダイオードが仲られお。
このようにして得られた発光ダイオード２ａｔ第５図及
び第６図に示すように、回銘麦板２４に取り付けられる
。即ち、上記回路基板２４は、発光ダイオード２３よシ
も却さが薄いフレキシブルシートであり、その上下両面
に、回路パターンが形成さｈている。また、回路基板２
４の所足箇所には、発光ダイオード２３を収納配置する
透孔２５が形成さノアており、この透孔２５の胆縁部に
け発光ダイメート２３の各導電箔１４ａ、１４ｂＫ対応
して、１対の銅箔２６．２６が断面路「コ」字状に形成
さｈている。との銅箔２６は、銅メッキ層、銅ｍ′、解
メッキ層、金メッキ層を順次積層したものであり、銅箔
２６の一部は、回路基板２４の平面を延ひて、回路パタ
ーンに接続はねている。
このように、銅箔２６．２６が形成さハた回路基板２４
の透孔２５内には、第５図に示すように、発光ダイオー
ド２３が遊嵌さｈ１月つ発光ダイオ−）’２３ノ各導電
箔１４ａ、１４ｂは、上記銅箔２６．２６上に配置さす
る。そして、上記発光ダイオード２３の側壁と上記銅箔
２６．２６との間の隙間に幻、半田２７．２７が融着さ
れ、こｆ−によｐ、発光ダイオード２３は回路基板２４
に取シ付けらｈる。ところで、上記半田２７．２７を融
着する場合には、第５図に示すように、発光ダイオード
２３ｆ透孔２５内に配遊嵌した状態で、回路基＠２４を
上下の治具２８．２９間にセットし、発光ダイオード２
３の側壁と銅箔２６．２６との間の隙間に対応する箇所
にイースト半田を塗布する。この後、上記回路基板２４
及び発薯ダイオード２３を治具２８．２９で押えて、ヒ
ータ（！）たけホットエア）３０で加熱する。すると、
ペースト半田が溶けて、銅箔２６．２６に案内官力、上
鍔ｒ″隙間に流引込むと共に、発光ダイオード２３の各
導電箔１４ａ、１４ｂとの間にも流ね込む、この後、冷
却してｄ−スト半田を硬化させ、上下の治具２８．２９
間より、発光ダイオード２３が取り付けられた回路基板
２４を取シ串せけよい２このようにして、発光ダイオー
ド２３が取り月けらｉｆｒ回路基板２４は、前述しｋ
Ｐ −Ｎ結晶体１５の各電極１８．１９に接続さｈた各
導電、箔１４ａ、１４ｂか、上記半田２７．２７を介し
て銅箔２６．２６に霜気的に接続される。また、上記回
路基板２４は、半田２７．２７が融着時に上汗の治ｘ
２＝８．２９で押えらｈて、発光ダイ祠−ド２３の上下
方向に盛り上がることがないので、発光ダイオード２３
の厚さよりも厚くなることがなく、極めて薄く構成され
る。
次に、上記のように、゛発光ダイオード２３が取り付け
られた回路基鈑２４をカード型小型電子式計算機に連用
する場合につき、身）７図汲ひ第９図１を参照して説明
する。
第７図は、カード型小型電子式計ａ機を示し１、こσ）
計算機は全体のＪすさが約０８℃程度の蔓絶て薄いもの
であり、表示部３１、太陽電池部３２、及びキーボード
ｇｉｆ８３４等を備え、第８図及び第９図に示すように
構成ζｐている。即ち、最上部にはキーシート３５が配
置さねている。このキーシート３５は、ポリエステル等
の透明な樹脂フィルムであり、このキーシート３５には
、上記表示部３１と、上記太陽電池部３２とに対応する
箇所に表示窓３５ａ、３５ｂが詐けられており、また、
キー日？−ド部３４に対応する箇所には、キー３５Ｃ・
・・・・・が印刷表示さりている。
上ｉピキーシート３５の下面には、ステ〉ルス製の接点
パネル３６が接着剤３７を介して接着されていると共に
、この接点ノ＋ネル３６の一ト面には、ステンレス製の
金属フレーム３８が接着剤３９を介してｖ％さｔている
。即ち、上記接点・やネル３６及び上記金妨フレーム３
８は、接着剤３９により、ラミネートさ勤て積層さ力て
いる。この場合、上記接点パネル３６には、上記表示窓
３５ａ、３５ｂと対応する箇所に開口３６ａ、３６ｂが
形成さｈていると共に、キー３５ｃ・・・・・・と対応
する箇所［ｏＪ勤接点３６ｃ・・・・・・が形成されて
いる８更に、上布゛接点パネル３６の下面には、後述す
る回路基板２４０発光ダイオード２３、ＬＳＩ４０、チ
ップ部品４１等と対応する箇所に凹部３６ｄ・・・・・
が形成さｈている。なお、上記金属フレーム３８は、接
点パネル３６の下部周囲を囲むものでをる。
上記金嫡フレーム３８内における上記接点）９ネル３６
の下１ｉ１ｉ＋には、ポリエステル等の樹脂フィルムよ
υなるスペーサ４２が接着剤４３により接着され、この
スペーサ４２の下面に口、回路基板２４が接着剤４４で
接着されている。この回路基板２４には、第６図に示す
ように、上下両面に回路パターンが形成されていると共
に、上記接点ノ（ネル３６の可動接め３６ｃ・・・・・
・と′−Ａ応する箇所に１足接点２４ｃ・・・・・・が
形Ｑｌ’、 ｄ ＃ている８オた、上記回路基板２４Ｋ
にｒ、その所定箇所に前述したように、発光ダイオード
２３が取り付けられていると共に、ＬＳＩ４０、チップ
部品４１等も取り付けらかでいる。更に、上記回路基板
２４には、液晶表示装置４５及び太陽電池４６がヒート
シール４５ ａ、 ４６ ａを介して接続さねている
。この場合、上ａ〔各ヒートシール４５ａ、４６ａけ、
一端が回路基板２４Ｋ、細端が液晶表示装置４５もしく
は太陽電池４６に夫々熱圧着さり、ている。また、上記
液晶表示装置４５は、上記接点パネル３６の開口３６ａ
内に配置されて、キーシート３５の表示窓３５ａに対応
しており、また、上記太陽電池４６は、接点パネル３６
の開口３６ｂ内に配置されて、キーシート３５の表示窓
３５ｂに対応している。
切に、上記回路基板２４の下面及びその隙間、並ひに金
木フレーム３８の外周には、充ケ剤４７が充填さｈてい
る。この充填剤４７は、アク＋フル系着′＃は、エポキ
シ系等の接別剤である。この充キ剤４７の下には、？リ
エステル等の樹脂フイ刀ムよりなるパックシート４８ｆ
知ｉｆｌにラミネートカットさ名ている８
このように構成されｔカード型小型電子式引算機により
は、発光ダイオード２３がこｈよりも厚さの薄い回路基
板２４に、上記発光グイオーｉパ２３とはぼ回じ埋さで
強固に取り付けらｒ１且つ、回路基板２４から突出した
発光ダイオード２３及びＬＳＩ４０、チップ部品４１等
がス４−サ４２の厚きを介して、接点）９ネル３６の凹
部３６ｄ・・・・・・内に配置さ負るので、計１４．機
全体の厚さ′ｆ−ｉめて薄くすることができる。因に、
上述したカード型小型匍子式「［算機においては、回路
基板２４の厚さが約０．２〜０．２５簡で、その上部の
犀ネ（キーシート３５、接点〕母ネル３６、スペーサ４
２）が約０．３ ｗｎで、回路基板２４の下部の蜂さく
補強板５０、パックシート４８、及び発光ダイズート９
２３の下へ突出したｆ３！含む）が約０２５〜０．３間
であり、とわら全体の胛さが約０８胴となシ、柘めて湖
い計初４抄が得らｈる。
々お、この発明は上述したようなカード型小型電子式計
算機に限ら戸ることなく、他の小型電子機器にも広く適
用することができる。
〔発明の効果〕
以上詐明したように、この発明に伶る発光ダイオードに
よｆ′１−１陽極電極及び陰極電極を有する半導体結晶
体をシートに形成さｆ−た負通孔内に配置し、この半導
体結晶体の一方の電極を上記シートに積層さ丈２て、上
記貫通孔と対応する箇所で・２つに分割さねた導電箔の
一方に接続し、且つ他方（Ｄ ％、 楡金上Ｑｃ’、導
電箔の他方にワイヤーボンデングによシ接続し、上記シ
ートの貫通孔を樹脂封止した構成であるから、全体の坤
さを極めて薄くすることかでき、例えば、カード型小型
市子式引算機等に用いれは ｆｆｌ詳機の薄型化を口［
ることカニできる。[/-] An anode 1 and a cathode 2 are set up in parallel, a P-N crystal 3 is placed on the upper end of the cathode 2, and the N-type electrode of the P-N crystal 3 is connected to the cathode. 2, and wire bond the P-type electrode to 4.
The anode 1 is connected to the anode 1, and then the straw is sealed in a substantially cylindrical shape with a resin 5, and the outer diameter of the resin 5 is generally about 1 to 2 square centimeters. However, in such a light emitting diode, since the P-N junction surface of the P-N crystal body 3 is perpendicular to the outer diameter of the resin 5, there is a problem that it is not suitable for thinning. Furthermore, the luminescent guimate shown in FIG.
and cathode 7 are arranged vertically in parallel, and between them, P-
The N crystal body 8 is arranged, and each electrode of the P-N crystal body 8 is directly connected to the anode 6 and cathode 7, and then,
It is made by sealing straw with resin 9 in the shape of a pine box, and the total thickness of these is approximately 0.7 to 0.9 runs, and two units are required. However, in such a light emitting diode, an anode 6 and a cathode 7 must be glazed on top and bottom of the P-N crystal 8, and the entire glaze must be sealed with a resin 9.
However, since it is small, there is a drawback that there is a limit to how thin it can be made. [Object of the Invention] The object of the present invention is to solve the above-mentioned problems and provide a light emitting diode having an extremely thin overall thickness. [Summary of the Invention] In order to achieve the purpose of this invention,
Sealed a semiconductor crystal having an anode electrode and a cathode electrode)
The semiconductor crystal is placed in the formed through hole, and one electrode of this semiconductor crystal is laminated on the sheet. The conductive foil is directly connected to one of the two halves of the conductive foil at a location corresponding to the through hole, and the other electrode is connected to the other of the conductive foil by wire bonding. The through hole is sealed with resin. [Embodiment] Hereinafter, an embodiment of the present invention will be explained in detail based on FIGS. 3 to 9. FIG. 3 shows the manufacturing process of a light emitting diode according to the present invention. In the figure, 10 is a film-like sheet made of polyimide resin. This 7-t10 is shown in Figure 13 (Al
, (A'), it is formed in a rectangular shape, and an adhesive 11 is applied to the lower surface thereof. After this, the sheet 10 is, as shown in FIG. 3 f81, (B'),
A through hole 12 is formed in the center of the punching process. In this case, the size of the communication hole 12 and the size of the device (P-N crystal 15 to be described later) are also formed to be very large.
, this temporary lower 1ni of the sheet 100 is shown in Figure 3 (C
), IC'), through the upper period corrigative 11,
A conductive foil 14 made of copper or the like is applied and laminated. This conductive foil 14 is formed to be longer than the sheet 10 by υ and protrudes to the side of the h1 sheet 10. Then, as shown in FIGS. 3(D) and 3(B'), the conductive foil 14 is removed by etching the center portion of the portion corresponding to the through hole 12 of the conductive foil 14, and is divided into two parts, left and right. They are arranged so that they do not conduct each other. In this way, conductive foil 1
As shown in FIGS. 3(E) and 3(B'), a PN crystal 15 is placed in the p-through hole J2 of the upper 8 [1 sheet] 0 provided with the PN crystal. In this P-N crystal body 15, as shown in FIG. A cathode electrode 19 is provided on the lower surface of the mold M16. ffl, the upper flange r'N-type layer 16 is made of gallium arsenic f
GaAs) is an N-type Evitacial waste grown by slowly cooling gallium-aluminum-arsenic (Ga'-χAtxAsl) containing N-type impurities on a substrate.
The type layer 17 is the same as the N type layer 16. Between the N-type layer 16 and the P-type layer 17, a PN junction surface 20 is formed. Note that the gallium/arsenic substrate of the N-type layer 16 is removed, and each of the N-type and P-type layers 16 and 17 has an anode.
M&19 and cathode electrodes 18 and 18 are deposited, respectively. As shown in FIG.
The conductive foil 1 is divided into two parts when placed inside the conductive foil 1.
Due to the stiffness of the conductive foil 14a on the left side in the figure, the cathode electrode 19 of the N-type layer 16 directly contacts and connects to the conductive foil 14a. In addition, P-type layer 1
The anode electrode 18 of No. 7 is divided into two conductive foils 14 by a wire 21.
B is upside down. After this, the 311th Wl (F
As shown in FIG.
7, and the 10F P LN crystal 15 is sealed with resin. By kneading, the whole J? The government is extremely thin (approximately 0.4
Level of solution) The light emitting diode is broken. The light emitting diode 2at thus obtained is attached to the nameplate 24 as shown in FIGS. 5 and 6. That is, the circuit board 24 is a flexible sheet that is thinner than the light emitting diode 23, and has circuit patterns formed on both its upper and lower surfaces. In addition, the circuit board 2
4, a through hole 25 is formed in which the light emitting diode 23 is housed, and at the edge of the through hole 25, a hole 1 is formed corresponding to each conductive foil 14a, 14bK of the light emitting dimate 23. The pair of copper foils 26 and 26 are formed into a U-shaped cross section. The copper foil 26 is made by sequentially laminating a copper plating layer, a copper m', a deplating layer, and a gold plating layer. The connection is bouncing. In this way, the copper foil 26.26 is formed on the circuit board 24.
As shown in FIG. 5, a light emitting diode 23 is loosely fitted into the through hole 25 of the light emitting diode 23. The conductive foils 14a and 14b are placed on the copper foil 26, 26. rub Then, solder 27.27 is fused to the gap between the side wall of the light emitting diode 23 and the copper foil 26.26, and the light emitting diode 23 is connected to the circuit board 24.
It is attached to. By the way, when fusing the solder 27 and 27, as shown in FIG. Light emitting diode 2
Apply yeast solder to a location corresponding to the gap between the side wall of No. 3 and the copper foil 26.26. After this, the circuit board 24
The ignition diode 23 is held down with jigs 28 and 29 and heated with a heater (!) (hot air) 30. Then,
The solder paste melts and flows into the copper foils 26 and 26, into the upper flange r'' gap, and also between the conductive foils 14a and 14b of the light emitting diode 23. After this, it is cooled. After hardening the d-st solder, attach the upper and lower jigs 28.29
In this way, the circuit board 24 with the light emitting diode 23 attached thereto can be removed.
The conductive foils 14a, 14b connected to each electrode 18.19 of the P-N crystal 15 are electrically connected to the copper foil 26.26 via the solder 27.27. Further, the circuit board 24 has the solder 27, 27 which can be used to cure excessive sweat when fused.
2 = 8.29, and the light emitting diode 23 does not bulge in the vertical direction, so the light emitting diode 23
It is extremely thin, never thicker than the thickness of . Next, the case where the circuit board 24 to which the light emitting diode 23 is attached is used in a card-type small electronic calculator as described above will be explained with reference to FIG. 7 and FIG. 9. Figure 7 shows a card-type small electronic meter (a).
The calculator is extremely thin with an overall J height of about 08°C, and is equipped with a display section 31, a solar cell section 32, a keyboard gif834, etc., and has a configuration ζp as shown in FIGS. 8 and 9. There is. That is, the key sheet 35 is arranged at the top. The key sheet 35 is a transparent resin film made of polyester or the like, and the key sheet 35 has display windows 35a and 35b hidden in locations corresponding to the display section 31 and the solar cell section 32. Also,
Key day? - The key 35C is located at the location corresponding to the code portion 34.
...is printed and displayed. A contact panel 36 made of stainless steel is adhered to the lower surface of the upper i-picky sheet 35 via an adhesive 37, and a metal frame 38 made of stainless steel is attached to one side of the contact panel 36. V% is applied via adhesive 39. That is, the contact points/flannel 36 and the metal frame 3
8 is laminated with an adhesive 39. In this case, openings 36a and 36b are formed in the contact panel 36 at locations corresponding to the display windows 35a and 35b, and openings 36a and 36b are formed at locations corresponding to the keys 35c. Further, on the lower surface of the upper cloth contact panel 36, recesses 36d are formed at locations corresponding to circuit boards 240, light emitting diodes 23, LSIs 40, chip components 41, etc., which will be described later.・・・
is being formed. Note that the metal frame 38 surrounds the lower portion of the contact panel 36. The above-mentioned contact point in the above-mentioned formal frame 38) 9 channels 36
A spacer 42 υ made of a resin film such as polyester is bonded to the bottom 1i1i+ with an adhesive 43, and a circuit board 24 is bonded to the bottom surface of the spacer 42 with an adhesive 44. As shown in FIG. 6, this circuit board 24 has a circuit pattern formed on both the upper and lower surfaces, and also has the above-mentioned contact points (movable contacts 36c of the flannel 36...
・One-leg contact 24c... is in the corresponding location with Ql', d #, and the circuit board 24K is
As described above, the light emitting diode 23 is attached to the predetermined location, and the LSI 40, chip components 41, etc. are also easily attached. Further, a liquid crystal display device 45 and a solar cell 46 are connected to the circuit board 24 via heat seals 45a and 46a. In this case, top a [each heat seal 45a, 46a,
One end is thermocompression bonded to the circuit board 24K, and the thin end is bonded to the liquid crystal display device 45 or the solar cell 46, respectively. Further, the liquid crystal display device 45 has an opening 36a of the contact panel 36.
The solar cell 46 is arranged within the contact panel 36 and corresponds to the display window 35a of the key sheet 35.
The display window 35b of the key sheet 35 corresponds to the display window 35b of the key sheet 35. Specifically, the lower surface of the circuit board 24 and the gaps therebetween, as well as the outer periphery of the Kaneki frame 38, are filled with a filler 47. The filler 47 is an epoxy adhesive or the like. Is there anything under this filler 47? Pack sheet 48f made of resin film such as reester
In the T-card type small electronic subtraction machine constructed in this way, the light emitting diode 23 is mounted on the circuit board 24 which is thinner than the light emitting diode 23. The light emitting diode 23, LSI 40, chip components 41, etc. that protrude from the circuit board 24 are connected to the contact point) 9 channel 36 through the thickness of the spacer 42. Since the recess 36d is disposed within the recess 36d, a total of 14. The overall thickness of the machine can be made thinner. Incidentally,
In the above-mentioned card-type small cylindrical calculator, the circuit board 24 has a thickness of approximately 0.2 to 0.25 mm, and the upper part of the circuit board 24 (key sheet 35, contacts), mother panel 36, and spacer. 4
2) is about 0.3 wn, and the beehive reinforcing plate 50 at the bottom of the circuit board 24, the pack sheet 48, and the light emitting diode 9
f3 protrudes below 23! (including) is between about 0.25 and 0.3, and the total length of Towara is about 0.8 to 8. In total, a total of 4 sho can be obtained. Furthermore, the present invention is not limited to the above-mentioned card-type small-sized electronic calculator, but can be widely applied to other small-sized electronic devices. [Effects of the Invention] As explained above, in the light emitting diode according to the present invention, a semiconductor crystal body having an f'1-1 anode electrode and a cathode electrode is placed in an f' negative through hole formed in a sheet. One electrode of this semiconductor crystal is laminated on the sheet to a length of 2, and connected to one side of the conductive foil divided into two at a location corresponding to the through hole, and the other (D%, Since it has a structure in which the Elegane Qc' is connected to the other side of the conductive foil by wire bonding and the through holes of the sheet are sealed with resin, the overall thickness can be made extremely thin. It is used in small-sized Ichiko type subtraction machines, etc. to make the ffl details machine thinner.
I can crab.
第１図及び第２図は、従来の発光ダイオードを概略的に
示した各斜視図、第３図ないし第９シ１にこの発明の一
実施例を示し、第３図（Ａｌ、（Ａ’）〜（Ｆ）、（Ｆ
′）は、発光ダイオードの段進過程を示す図、第４図は
、Ｐ−Ｎ結晶体の正面図１、第５図は、発光ダイオード
を回路２１ｉ！＝飯に取り柑け６ときの椴略断面図、第
６図は、発光ダイオードが取り付けらｔまた回路基板の
平前図、第７シ１７いし第９図は、発光ダイオードをカ
ード型小型り子犬計算機に適用した場合を示し１、第７
図１１１ カード型小型電子式計算機の外観斜視図、第
８図は第７図の■−■線断面図、第９図はその分解斜視
図である。
ｌＯ・・・・・・シート、１２・・・・・・ｙ−Ａ孔、
１４．１４ａ、１４ｂ・・・・・・導電箔、１５・・・
・・・Ｐ−Ｎ結晶体、１６・・・・・・Ｎ型層、１７・
・・・・・Ｐ型層、１８・・・・・・陽極電極、１９・
・・・・・陰極ｔ１．極、２１・・・・・・ワイヤーボ
ンデング、２２・・・・・・樹脂。
手続稲正書 （方式）
昭和５８年４月２７日
特許庁長官若杉和夫 殿
■、小事件表示
昭和５７年特許願第２１６９５６号
２、発明の名称
発光ダイオード
３ 補正をする者
事件との関係 特許出願人
住 所 東京都新宿区西新宿２丁目６番１号名 称 （
１４４）カシオ計算機株式会社代夛者 樫 尾
俊゛ 雄
４、代理人
住 所 東京都中央区銀座６丁目７番１６号岩月ビル８
階 ・
氏名 弁理士（６５４８）山田端彦ノ
５、補正命令の日付
（１）明細書の「発明の詳細な説明」の欄。
（２）明細誓の「図面の簡単な説明」の欄。
（３）図 面。
７、 補正の°内容
（１）明細書第４頁第７行目に「（ｋ）、いり」とある
のを「（Ａ１）、（Ａ２）Ｊと訂正する〇
（２） 同第４頁第１０行目に１（Ｂ）、Ｖ月とある
のを「（Ｂ１）、（Ｂ２）と訂正する。
（３）同第４頁第１５行目に［（Ｃ）、Ｃ月とあるのを
「ｒ（０１）、（０２）Ｊと訂正する。
（４）同第４頁最終行にｒ（Ｄ）、（財）」とあるのを
ｒ（Ｄｌ）、（Ｂ２ ）Ｊと訂正する。
（５）同第５頁第５行目及び第６頁第２行目に「（Ｅ）
、（９）」とあるの’！１−ｒ（Ｅｌ）、Ｉ ＩＤ２
）Ｊとそれぞれ訂正する。
（６）同第６頁第１１行目に「（Ｆ）、に）」とあるの
を［（Ｆｌ）、ｆ Ｆ２ ）Ｊと訂正する。
（７）同第１４頁第５行及び第６行に「；８３図（Ａ）
、（υ〜（Ｆ）、（ロ）は、」とあるのを［第３図（Ａ
１）、（Ａ２）〜（Ｆｌ）、（Ｆ２）は、」と訂正する
。
（８）図面中、射３図（Ａ１）、（Ａ２）〜（Ｆｌ）、
（Ｆ２）を別紙の通りに１圧する。FIGS. 1 and 2 are perspective views schematically showing a conventional light emitting diode, FIGS. 3 to 9 show an embodiment of the present invention, and FIGS. ) ~ (F), (F
') is a diagram showing the step-up process of a light emitting diode, FIG. 4 is a front view 1 of a P-N crystal, and FIG. 5 is a diagram showing a light emitting diode circuit 21i! Figure 6 is a schematic cross-sectional view of the circuit board when the light-emitting diode is attached. 1 and 7 show the case when applied to the puppy calculator.
FIG. 111 is an external perspective view of a card type small electronic calculator, FIG. 8 is a sectional view taken along the line ■-■ in FIG. 7, and FIG. 9 is an exploded perspective view thereof. lO... sheet, 12... y-A hole,
14.14a, 14b... Conductive foil, 15...
...P-N crystal, 16...N-type layer, 17.
... P-type layer, 18 ... Anode electrode, 19.
...Cathode t1. pole, 21... wire bonding, 22... resin. Proceedings (Method) April 27, 1980 Kazuo Wakasugi, Commissioner of the Japan Patent Office■, Small case indication 1982 Patent Application No. 216956 2, Title of invention Light emitting diode 3 Relationship with the person making the amendment Patent Applicant Address 2-6-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo Name (
144) Casio Computer Co., Ltd. Representative Kashio
Toshio Yu 4, Agent Address: 8 Iwatsuki Building, 6-7-16 Ginza, Chuo-ku, Tokyo
Floor ・ Name Patent attorney (6548) Yamada Hikono 5, Date of amendment order (1) "Detailed description of the invention" column of the specification. (2) "Brief explanation of drawings" column of detailed declaration. (3) Drawing surface. 7. Contents of the amendment (1) "(k)," on the 7th line of page 4 of the specification is corrected to "(A1), (A2) J.〇(2) Page 4 of the specification In the 10th line, 1(B), month V is corrected as ``(B1), (B2). (4) In the last line of page 4, correct “r(D), (goods)” to r(Dl), (B2)J. . (5) “(E)
,(9)'! 1-r(El), I ID2
)J and correct each other. (6) On page 6, line 11 of the same page, ``(F), ni)'' is corrected to [(Fl), f F2 )J. (7) On page 14, lines 5 and 6, “;Figure 83 (A)
, (υ~(F), (b) are
1), (A2) to (Fl), and (F2) are corrected. (8) In the drawings, Figures 3 (A1), (A2) to (Fl),
Apply 1 pressure to (F2) as shown in the attached sheet.
Claims (1)
陽極電極及び陰罹電極を有する半導体結晶体と、この半
導体結晶体を収納する貫通孔ｆｍえたシートと、とのシ
ートに積層され、上配貝通孔に対応する箇所で２つに分
割された導電箔とを具備し、上＝ｅレシート貫通孔内に
配置さｔまた上８１半導体結晶体の一方の霜、極を２つ
に分割さｈた上記導電箔の一方に接続し、且つ他方の電
極を上記導電箔の他方にワイヤーボンデングにより接続
し、上記シートの貫通孔を樹脂封止してなることを特徴
とする発光ダイオード。At least one P layer and one N layer are broken, and each layer is laminated with a sheet of a semiconductor crystal body having an anode electrode and a cathode electrode, and a sheet with a through hole fm for accommodating the semiconductor crystal body, It is equipped with a conductive foil divided into two at a location corresponding to the upper shell through hole, and upper = e placed in the receipt through hole. A light emitting diode, characterized in that it is connected to one of the divided conductive foils, the other electrode is connected to the other of the conductive foils by wire bonding, and the through holes of the sheet are sealed with resin. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57216956A JPS59107584A (en) | 1982-12-13 | 1982-12-13 | Light-emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57216956A JPS59107584A (en) | 1982-12-13 | 1982-12-13 | Light-emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59107584A true JPS59107584A (en) | 1984-06-21 |
| JPH0475672B2 JPH0475672B2 (en) | 1992-12-01 |
Family
ID=16696546
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57216956A Granted JPS59107584A (en) | 1982-12-13 | 1982-12-13 | Light-emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59107584A (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0398575A2 (en) * | 1989-05-17 | 1990-11-22 | AT&T Corp. | Method of manufacturing optical assemblies |
| WO2002017405A1 (en) * | 2000-08-23 | 2002-02-28 | Osram Opto Semiconductors Gmbh | Optoelectronic component and method for the production thereof, module and device comprising a module of this type |
| EP1253650A2 (en) * | 2001-04-25 | 2002-10-30 | Agilent Technologies Inc | Surface-mount type light emitting diode |
| WO2004004017A2 (en) * | 2002-06-26 | 2004-01-08 | Osram Opto Semiconductors Gmbh | Surface-mountable light-emitting diode and/or photodiode and method for the production thereof |
| WO2005064696A1 (en) * | 2003-12-30 | 2005-07-14 | Osram Opto Semiconductors Gmbh | Radiation-emitting and/or radiation-receiving semiconductor component and method for the production thereof |
| EP1162669A3 (en) * | 2000-06-09 | 2006-07-05 | SANYO ELECTRIC Co., Ltd. | Light irradiating device, manufacturing method thereof, and lighting apparatus using the light irradiating device |
| EP1280211A3 (en) * | 2001-07-25 | 2006-09-20 | Sanyo Electric Co., Ltd. | Light emitting device with improved heat dissipation and its manufacturing method |
| JP2007519233A (en) * | 2003-12-30 | 2007-07-12 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Beam emitting type and / or beam receiving type semiconductor component |
| JP2008047836A (en) * | 2006-08-21 | 2008-02-28 | Hamamatsu Photonics Kk | Semiconductor device and manufacturing method of semiconductor device |
| JP2012191151A (en) * | 2011-03-11 | 2012-10-04 | Lingsen Precision Industries Ltd | Manufacturing method of bar type led light and bar type led light manufactured by manufacturing method |
-
1982
- 1982-12-13 JP JP57216956A patent/JPS59107584A/en active Granted
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0398575A2 (en) * | 1989-05-17 | 1990-11-22 | AT&T Corp. | Method of manufacturing optical assemblies |
| EP1162669A3 (en) * | 2000-06-09 | 2006-07-05 | SANYO ELECTRIC Co., Ltd. | Light irradiating device, manufacturing method thereof, and lighting apparatus using the light irradiating device |
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Also Published As
| Publication number | Publication date |
|---|---|
| JPH0475672B2 (en) | 1992-12-01 |
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