JPS59101567U - Recording and playback machine - Google Patents

Recording and playback machine

Info

Publication number
JPS59101567U
JPS59101567U JP19931782U JP19931782U JPS59101567U JP S59101567 U JPS59101567 U JP S59101567U JP 19931782 U JP19931782 U JP 19931782U JP 19931782 U JP19931782 U JP 19931782U JP S59101567 U JPS59101567 U JP S59101567U
Authority
JP
Japan
Prior art keywords
recording
playback machine
recorded
digital data
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19931782U
Other languages
Japanese (ja)
Inventor
正彦 佐藤
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP19931782U priority Critical patent/JPS59101567U/en
Publication of JPS59101567U publication Critical patent/JPS59101567U/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示す構成図、第２図はその
具体回路図、第３図は第１図例の説明に供する線図であ
る。 ２はバッファ回路、３はスライサ、４はペデス゛タルレ
ベル検出回路、６はモノマルチパイブレー、夕、７はゲ
ート回路、１００はＶＴＲ，２００は　　　　“−スラ
イス回路である。FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a specific circuit diagram thereof, and FIG. 3 is a diagram for explaining the example shown in FIG. 2 is a buffer circuit, 3 is a slicer, 4 is a pedestal level detection circuit, 6 is a monomultiply relay, 7 is a gate circuit, 100 is a VTR, and 200 is a "-slice circuit".

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 記録すべきあるいは再生された映像信号から垂直区間の
所定水平区間に挿入されたデジタルデータ信号を除去す
るスライス回路を有する録画再生機。A recording/reproducing apparatus having a slicing circuit for removing a digital data signal inserted into a predetermined horizontal section of a vertical section from a video signal to be recorded or played back.
JP19931782U 1982-12-27 1982-12-27 Recording and playback machine Pending JPS59101567U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19931782U JPS59101567U (en) 1982-12-27 1982-12-27 Recording and playback machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19931782U JPS59101567U (en) 1982-12-27 1982-12-27 Recording and playback machine

Publications (1)

Publication Number Publication Date
JPS59101567U true JPS59101567U (en) 1984-07-09

Family

ID=30424856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19931782U Pending JPS59101567U (en) 1982-12-27 1982-12-27 Recording and playback machine

Country Status (1)

Country Link
JP (1) JPS59101567U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447425A (en) * 1977-09-21 1979-04-14 Matsushita Electric Ind Co Ltd Picture recorder/reproducer
JPS5591277A (en) * 1978-12-28 1980-07-10 Matsushita Electric Ind Co Ltd Magnetic recorder/reproducer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447425A (en) * 1977-09-21 1979-04-14 Matsushita Electric Ind Co Ltd Picture recorder/reproducer
JPS5591277A (en) * 1978-12-28 1980-07-10 Matsushita Electric Ind Co Ltd Magnetic recorder/reproducer

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