JPS5894221A - Separating filter - Google Patents

Abstract

PURPOSE:To improve the frequency characteristics of a luminance signal, by adding the output signal of a BPF to the signal supplied from a delaying circuit corresponding to the correlation and compensating the deterioration of the frequency characteristics due to the delaying circuit. CONSTITUTION:The signals supplied from an input terminal 10 and delaying circuits 11 and 12 are supplied to a series circuit of delaying circuits 31, 32, 33, 34 and 35, 36. The signals of the input sides of these delaying circuits are added to the signals of the output sides through adder circuis 37-39. The signals supplied from transversal filters are supplied to a logical arithmetic circuit 15 as well as to inverters 14 and 18. The output signal supplied from the circuit 33 is supplied to an adder circuit 40, and at the same time the signal from the circuit 38 is set at an optional level through a level control circuit 41 and then supplied to a subtractor circuit 20. Here the chroma signal is subtracted from the signal supplied from the circuit 40 to obtain the good luminance signal. Then the frequency characteristics of the luminance signal is improved since the deterioration is compensated for the frequency characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a separation filter that separates a plurality of correlated signals based on their respective correlations.

By the way, conventional filter devices convert a signal that changes in the time dimension into a frequency dimension by Fourier transform, and filter the frequency component. In response to this, the inventor of the present invention previously proposed a film device that converts a signal that changes in the dimension of one hour into a pattern space and performs filtering by deforming this pattern.

An example of such an Ailter device will first be described below with reference to l11w1.

First, the pattern space will be explained. For example, one frame of television signal is measured vertically and horizontally.

Considering that it is composed of n pixels, the amplitude t of each pixel is
.

f(x+, yρ However, if 1<i<m, 1<j<n, the above television signal is t(x=y,)vm x
n = k 1111 It can be considered that K are lined up. For example, convert this to F-(ft*fx・・・・・・・・・・fk) However,
By expressing f1=f(Xl,Yl)cloudyf,=t(x=yn), this one frame television signal can be considered as a dimensional vector r.

This is called a pattern space, which is a multidimensional space created when the signal levels at multiple points in time are expressed in vectors in each dimension.

Similarly, the signal level ft-1゜f of three adjacent points
t, ft++ (2<t(k 1 )11t using 3
It is possible to construct a dimensional no(turn space).

Diagram 1 is a perspective view of such a three-dimensional space, where each vector is represented by any point in the space encompassed by the maximum level of the signal.

In this 3-kumoto pattern sky, the line segment connecting the origin O and the point P with the maximum vector is ft-1"" ft:
ft+1.

In addition, the plane shown in Diagram 2 AK shows that ft-1" = ft→ft, l.Furthermore, the plane shown in Fig. 2 BK shows t that ft" is ft+1 from ft-1, These indicate that the signal is changing in a step-like manner.

On the other hand, the plane shown in Figure 2 CK shows that ft-1=ft+1~ft, which indicates that the signal is changing rapidly.

When viewed from above, this three-dimensional pattern space vo-p@ looks like Figure 3. Here, the signals in each range are changed to 5 as shown in the figure.
The 0-P line in the L1 diagram is the origin, the plane in the 812 diagram A is the A axis, and the B
The plane of is represented by the B axis, and the plane of C is represented by the C axis.

In this case, the original signal is 1iI11iI! 5K as shown in %1iE45AA because the correlation between the signals is extremely strong.

It is concentrated in the range of A-Aii to B-Bii, and C
- It does not exist in the vicinity of the C line.On the other hand, since there is no correlation between adjacent signals, noise etc. is distributed uniformly throughout the entire area as shown in Fig. 4 BK.

That is, for example, in the case of a signal as shown in Fig. 5, if it is converted into the above-mentioned pattern space *III, it becomes as shown in Fig. 6. Note that (○) in Figure 5 indicates the position of the signal.

In this case, the signal t outside the diagonally shaded range of $16@l
, for example, when it is deformed like an arrow, noise N1
%NB can be removed.

This transformation can be performed, for example, using the following five logical operations.

That is, ft'=MAXiMIN(fl-1, ft), MIN(
ft, f(+1)・MIN(ft-1, ft+lN
・・・・・・・・・・・・tll2 MIN (MAX(
fl-1, fl), MAX(ft, ft+t).

MAX(ft-1, ft+1)l ・・・・・・
...Transformation is performed using the logical operation in (2). Here M
AX is to take out the largest item in the parentheses below, MI
N indicates to find the minimum - in the parentheses below.

By performing this logical operation, for example, in the noise NZ part of Fig. 5, f,'-MAX(MIN(fy, fs), MIN(f,
,f,).

M I N (fy, fe)1 -MAX (fs, fs, fy) =-f.

becomes. Also, in the noise N2 part, fll' - MAX (MIN (flo, fo) *
MIN (fll, ft2) * MIN (flo, fx
z ) 1 - MAX(fto, flz, fto )=f12, and the noise N1. Nz is removed. Note that the noise N3K is also removed in the same way as the noises N and l.

On the other hand, for example, the fs signal (・te&yo).

f,': MAX (MIN (f4. fs),
MIN (fs, fs).

MIN(f4.fs)1 =: MAX (f4. fII, f<) = [5 becomes. Also, in the fs signal.

f6'2 IliiAX(MIN(fs, fs), MIN
(fs, fy).

MIN(f5.fy)1 =MAX (f5. fs, fs) 2f6 As a result, the original signal is extracted as is.

After this 5K, I applied it to the above-mentioned filter device.

Noise can be removed without degrading the original signal.

Further, Figures 7 to 9 show specific circuit configurations.

Figure 7 shows the overall configuration, in which the signal supplied to the input terminal (1) is supplied to the delay circuit (2), +31 series circuit, which has a delay time corresponding to the period of the highest frequency of the original signal. be done. Furthermore, the signal from the input terminal (1) and the output signal of the delay circuit +21, t3+ are expressed by the above formula f
lJ or +21 K +1 logical operation enclosure (4
). Then, the signal subjected to the logical operation processing is taken out from the output terminal (5)K.

The logic operation circuit (4) is configured as follows.

Figure 118 corresponds to the above equation ill K. In this li, a pnp type transistor (51a), (
52a), (slb), (s2b), (51c),
(Three sets of paths, 52 and K, are provided. Their collectors are connected together, and two emitters are connected to each other, and each of these connection points is connected to a resistor (53m).

Power terminal (b) K is connected through (53b) and (53c).

Terminal (55m) to which signals (ft-1, ft, ft+s f) are supplied.

(s5b), (ssc) are set up, terminal (55a) or transistor (51g), (52c), terminal (55b
) are transistors (52a), (51b), terminals (5
5C) is a transistor (52b).

(51C) are connected to each pace. Furthermore, the connection points of the emitters of the transistors (51a) to (52c) are connected to sot1. SotL n p n-type transistor (56a
), (56b).

(56C), the collectors of these transistors (56m) to (56c) are connected to a power supply terminal 641, their emitters are connected to each other, and this connection point is grounded through a resistor 6D. The connection points of the emitters of the transistors (56a) to (56C) are connected to the output terminal line Km.

According to this circuit, transistors (51a), (52
At a), the smaller signal from the terminals (55a) and (55) is taken out, and the transistors (51b) and (52
At b), the smaller signals from the terminals (55b) and (55c) are scattered, and the transistors (51+e) and (
52C) The smaller signal from the terminals (55c) and (55a) is taken out. and a transistor (
56m) ~ (56C) K, transistor (51a)
The maximum signal from (52c) is extracted and output to the output terminal (b).

Also, Figure 1119 corresponds to the above equation 121K, and is the pnp type transistor (51a) to (
52C) are each npn type transistors (51a)
〜(52c) When Ktllll is changed and the npn type transistors (56a) to (56c) are respectively replaced with the pnp type transistors (56a) to (56c') K, the power supply chain and *m are replaced. be done. This FEJwl
According to the transistors (51a') to (52C), the larger one is output, and the transistor (56a)
The smallest of these is output at ~(56C).

Furthermore, in the color video signal of the NTSC system, the phase of the carrier wave of the chroma signal is inverted every horizontal period. 7, a signal fl and a signal ft-H for one horizontal period (H)ill are used instead of the above-mentioned signals ft-1, ft, and ft+1.

And after one horizontal period, the signal ft+a1 is divided by 9 mm to form a pattern similar to that described above. Here, the luminance signal component (C
)), chroma signal component (X), and t.

In this way, these signals are roughly shown in Figures 10 and 11-
As shown in Figure 5, the luminance signal component is distributed approximately between the As and B axes, and the chroma signal component is distributed near the C axis. Therefore, in order to extract the chroma signal from the above-mentioned signal, it is sufficient to transform it in the C direction on the pattern space.

FIG. 12 shows a circuit for producing a 5K chroma signal. In the figure, a signal from an input terminal (II) is supplied to a series circuit of delay circuits Uυ and a2 each having a delay time corresponding to one horizontal period.Furthermore, a signal from an input terminal Oα is supplied to a series circuit of delay circuits Uυ and a2, each having a delay time corresponding to one horizontal period. A bandpass filter OJ corresponding to the band and an inverter (141Y
A jite l! Supplies 1-fill calculation calculation circuit α51&C. Further, the signal from the delay circuit Uυ is supplied to the logic operation circuit 051 through the bandpass filter uQv similar to that described above. Also, is the signal from the delay circuit az or the bandpass filter CI similar to the above? ) and the logic operation circuit αSK through the inverter us.

Here, as the logic operation circuit α9, a circuit equivalent to the logic operation circuit (4) in FIG. 7 described above is used.

Therefore! Scanning line 1#Jlk111 as shown in Figure 13AK
, m is supplied, at the time of extracting the chroma signal of scan 1iIiJ, K as shown in Figure BtlC of m13 is provided.
Signals i, j, are supplied to a logical operation circuit acjK.

Also, at the time of extracting the chroma signal from the scanning line, l113
aclCK indicates 5Kj, k, ttD signals or logic operation circuit αCJK is supplied. Furthermore, at the time of extracting the scanning alt and pma signals, K k
, l, and m are supplied to the logical operation circuit αSK.

And it's great that such a signal is provided.

From the logic operation circuit acJ, t is taken out as signals j and t as shown in FIG. 13EK.

This signal is supplied to the adder circuit (IIK), and the original signal from the delay circuit Qυ is sent to the bandpass filter α3゜4,
The signal is supplied to the adder circuit alK through a delay circuit corresponding to the delay characteristics of aD, and the luminance signal component is removed. The chroma signal from which this luminance signal has been removed is output to the output terminal (
2tlK is taken out.

Furthermore, the chroma signal from the adder circuit (2) is supplied to the subtraction circuit (2), and the signal from the delay circuit (2) is supplied to the subtraction circuit (2).
chroma signal components are removed. Then, the luminance signal from which the chroma signal component has been removed is taken out at the output terminal.

In the filter device described above, the delay circuits aυ and Q3 corresponding to one horizontal period are essential. However, if such a delay circuit t' is formed using a charge transfer device such as a BBD or a COD, the frequency characteristics of the original signal supplied to, for example, the subtraction circuit 0 will deteriorate due to the low-pass characteristics of the charge transfer device, resulting in a separation problem. The frequency characteristics of the luminance signal will be degraded.

In other words, if the frequency characteristics of the input signal are as shown in Figure 14 A (hatching indicates the chroma signal component), the characteristics of the output signals of delay circuits αυ and a3 will be as shown in B and C, respectively. . These signals are fed to a bandpass filter Q3, C18, α7)K, for example, g
, F are extracted. Bandpass filter haze so that these signals - for example the 3.56 MHX signal - are at a constant level.

The output signal of aD is amplified (shown by a broken line) and supplied to the logic operation circuit 09. Here, the signals supplied to the logic operation circuit 05 are averaged because the signals from the bandpass filters αJ and αη have opposite characteristics to the signal from the bandpass filter αe. A good calculation is performed and the Roma signal like q is separated.

However, since the subtraction circuit <23 is supplied with a signal with degraded frequency characteristics from the delay circuit aυ, even if the correct chroma signal is subtracted from this signal, it is not possible to obtain a good luminance signal as shown in HK5. I can't.

In view of the above point K, the present invention is designed to enable good signal separation with a simple configuration. An embodiment of the present invention will be explained below with reference to the drawings.

In Figure 15, this example uses bandpass filters α3,
In Figure 1, the signals from the input electronic OG and delay circuits aυ and Q3 are 3.58M, respectively, when second-order transversal filters are used as 0 (to) and aD.
The i-wave length of the color subcarrier in Hz corresponds to 140 n5ac
The signal is supplied to the delay circuit 6υl (to) and the series circuit of 關, 值, moxibustion, @, and the signal on the human power side and the signal on the output side of these delay circuits are each weighted 4'2'4. Addition is performed by the adder circuit C(7), r;s, (to). In these transversal filters, however, T
A frequency characteristic of 140 n5ec is obtained, and a bandpass characteristic with the peak at 3.58 M)h is obtained.The signals from these transversal filters are supplied to the logic operation circuit (151 and inverter Q41, tts). be done.

In this circuit, the signal on the output side of the delay circuit Q is supplied to the adder circuit -K, and the signal from the adder circuit (to) is adjusted to an arbitrary level by the level adjustment circuit G4m), and the signal is adjusted to an arbitrary level by the adder circuit MK. Supplied. Furthermore, the signal from this adder circuit is supplied to an adder circuit 0 and a subtracter circuit 123.

In this enclosure, from the delay circuit (to) $116 figure A
A signal such as . In addition, a signal such as 1681) H is taken out from the adder circuit (to), and when this signal is added at a predetermined level, from K, the adder circuit outputs an approximately original signal as shown in Figure 16 C. A signal equal to the signal of is extracted.

Therefore, by subtracting the chroma signal from this (No. 8), a good luminance signal can be extracted.

In this way, the luminance signal and chroma signal are separated, and since the deterioration in frequency characteristics caused by the delay circuit is compensated for in the present invention, the frequency characteristics of the output luminance signal are also extremely good.

Furthermore, since a low-order transversal filter is used as the bandpass filter, the phase characteristics of the bandpass output will not deteriorate, and even if this signal is added, the phase characteristics of the signal will not deteriorate.

Note that the present invention can also be applied to a filter device using a pond-type logic operation circuit.

[Brief explanation of the drawing]

Diagrams 15A to 14 are diagrams for explaining the filter device previously proposed by the inventor of the present application, Figure 5115 is a configuration diagram of an example of the present invention, and Figure 16 is a diagram for explaining the same. Ql is an input terminal, aυ, Ql is a delay circuit, α9 is a logic operation circuit, r2n, (c) is an output terminal, ■ is a subtraction circuit, Gυ~ (to) is a delay circuit that constitutes a transversal filter, C37)~ The adder circuit %- which constitutes the four-wave transversal filter is an adder circuit, and 0υ is a level adjustment circuit. Figure 4.
E -, i'- "-111 358 paHI G 1 JriOan(

Claims (1)

[Claims] Plural signals having correlation [In a separation filter that filters based on the correlation of each, the output signal of the bandpass filter is added to the signal from the slow mwA path that contradicts the correlation. A separation filter that uses 5K to correct the deterioration of frequency characteristics due to the above-mentioned slow decline.