JPS5881356A - Error control system - Google Patents

Abstract

PURPOSE:To perform not only error detection, but also error correction of an error-detected frame, by using information before a decision on a received signal, i.e. analog weight, by adding a simple circuit to an ARQ demodulator and an error detector. CONSTITUTION:A demodulator 51 strictly discriminates a received signal and also extracts the analog weight of every element. The extracted analog weight is applied to an analog weight storage part 52 to store the increasing-order number of pieces of analog weight information and current reception decision results. On the basis of the reception decision result of an element with small analog weight, an error pattern estimating device 53 estimates an error bit pattern. A remainder arithmetic device 54 divides the polynominal of the obtained bit error pattern by a generating polynominal G(x) to find a current remainder. A remainder pattern composing device 55 composes a remainder by using said remainder. A deciding device 59 finds a pattern with a remainder 0 in the sum of the remainder of the composing device 55 and that of the remainder arithmetic device 57 and when the pattern with a remainder 0 is not found, a request to resend is sent to a transmission side through a line 602.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an error control method in a data transmission line.

In data transmission, in order to efficiently transmit highly reliable information, it is necessary to protect the information from errors caused by interference on the communication path, such as line noise. For this reason, data communication systems always perform some form of error control. Error control methods include automatic repeat request (ARQ) and unidirectional error correction (FBC).

The ARQ method is currently widely used. This is because it is easy to implement and has overwhelmingly superior reliability compared to FEC and the like.

However, the ARQ method has the disadvantage that if even one pit error occurs in one frame, the entire frame must be retransmitted, and is therefore inefficient. To compensate for this drawback, a no-implied method has been proposed, which is located between the ARQ method and the FEC method, in which all errors that can be corrected are corrected on the receiving side, and only errors that cannot be corrected are retransmitted by the transmitting side. has been done. However, the error detection ability of the hybrid system is inferior to that of codes dedicated to detection, and furthermore, the addition of an error correction function has the disadvantage of complicating the hardware of the device.

Furthermore, in digital modulation and demodulation systems such as the PSK system and the QAM system that are currently widely used, input data information is differentially encoded in order to provide long-term stability of the demodulator and a high-quality phase correction loop. When differential encoding is performed, an error in one element spreads to an error in two elements, so even if Gray encoding is applied, at least two pit errors will occur. Therefore, an error of 1 element in one frame becomes a 2-bit error, and an error of 12 elements becomes a 4-bit error.When trying to apply the FEC method or hybrid method as an error correction function, it is necessary to use coding with excellent error correction ability. Therefore, the scale of the decoder becomes extremely multi-wire.

The present invention solves the above-mentioned drawbacks of the prior art, and adds a simple peripheral circuit to the demodulator used in the conventional ARQ system, thereby adding error correction capability in addition to the conventional error detection capability. The purpose of this study is to provide an error control method that allows

A feature of the present invention for achieving this purpose is that when demodulating the received signal, the analog information of the received signal before decoding is reduced (
For each block in which an error has been detected, the analog information corresponding to the block is used to estimate the error bit number (turn), and an error detection means is applied to the error bit number (turn). By this, it is checked whether or not there is a bit pattern that is the same as an error pit nocturne that occurred on the communication path in the estimated error pit pattern, and if it exists, it is determined based on the bit nocturne that is estimated incorrectly. The error control method is such that the error is corrected by controlling the reception judgment data, and if the error does not exist, a request is made to the transmitting side to retransmit the block.

A detailed explanation will be given below with reference to the drawings. Figure 1 shows the conventional A
A conceptual diagram of the RQ method is shown. The present invention relates to 5 demodulators and 6 error detectors. Here, some explanation will be given regarding the conventional ARQ method. 1 is the information source. In encoder No. 2, one transmission code string that performs block encoding including (n-k) bits of check pits whose pit information can be determined from generation polynomial from No. 1 is F (xl),
F (x) is composed of pit information and inspection bits of (n−k) pits, and is expressed as follows.

F(xl = M(xi x - R(x) = G(x
i・Q(Xl ・・・・・・・・・・・・
(11) However, M(x) is an information polynomial of degree (k-1) or less, and G(x) is a generator polynomial for creating check bits.

Q (X) is the quotient when M(xi −x”−k is divided by G (x)), and R(xl indicates the remainder, that is, the check bit.

Also, M(x), R(xi is the input data information ao-
ak-1, check bit b; By using -1 for -brr-, it is expressed by the following equation.

M(X=a, +a1x+a, x'+----・+ak
>x (2) R(xl=bo+b, x+b2x2+
...””+bn-1. tx(3) Therefore, the transmission code string F
(x) is an information code sequence M(x
) is added with the test pitch R(x).

Now, if an error occurs due to noise on the transmission path of 4, the error code string B(x) at that time is expressed by the following equation.

E(x)=eo+e, x+e, x”+・−・・−+en
-IX (4) However, e is 1 if the first bit is incorrect, and O if it is not incorrect. Therefore, by using equation (4), the received code string F'(
xl is expressed by the following equation.

F'(x) = F(x) + E(xl
--(5) Next, the received code string F'(x) is checked in the error detector 6 to see if there is an error in the received block by checking whether it is divisible by the generating polynomial 〇(x). The remainder is O
If so, you know that there is no error in that frame,
It is output as is to the decoder 7. If the remainder is not 0, there is an error in the frame and a retransmission request will be sent.
It is sent to the transmitting side through the return path of 02.

Through such operations, highly reliable data transmission can be realized. However, in the method described above, for example, 1
Assuming that a frame consists of 1000 pits, even if there is a 1-bit error in the frame, 1 frame, or 1000 bits, must be retransmitted.

The present invention utilizes the correlation between error elements and the received signal state at that time as described below.
It corrects errors up to the bit level and compensates for the above drawbacks. Furthermore, it is relatively easy to implement the present invention into an apparatus.

In the demodulator No. 5, the judgment of the received signal is based on Hard Dicisio, which only determines whether it is 1 or O based on the threshold.
n (hard decision), and analog information possessed by the received signal before the decision was not taken into consideration.

However, in cases where the transmission path can be modeled using white dots, such as a satellite line, there is a very strong correlation between errors and the analog information at that time.

The analog information here refers to the distance from the received signal level to the nearest decision threshold. Therefore, the shorter the distance, the greater the probability that the received signal is incorrect, and conversely, the longer the distance, the greater the probability that the received signal is correctly received. Hereinafter, the distance representing analog information will be referred to as analog weight.

FIG. 2 shows the result of calculating the relationship between the error and the analog weight at that time for a binary case. Figure 2 shows the case where a hard decision is made on an n-bit received signal, and an m-bit error occurs in the received signal, and then the analog weight of the m-bit error bit is counted from the smallest of the n analog weights. Multiply the probability by m when all items are included up to Mth.3. This is the result of calculation for M<;:10, M>m. As can be seen from the figure, when the S/N (signal power to noise power ratio) is high to some extent, there is a very large correlation between the error bit and the analog weight at that time.

In the present invention, error correction is performed by using both the analog weight and the error detection ability of the code.

In other words, hard-decision frame-by-frame data is checked for the presence or absence of errors within the frame using an error detector, and if there are no errors, it is output as demodulated data as it is, and the error detector detects the presence of errors. If so, perform the following operations to correct the error.

The smallest bit among the n bits of analog weight, 2
e of the order corresponding to the th, third smallest bit, etc.
By setting , to l, an error pattern as shown in equation (4) is created. For example, if we consider the two smallest analog weights, we can assign the corresponding order m7. m
2, the estimated error pattern is expressed by the following equation.

Also, the number of analog weights to be considered is m, , m, ,
The estimated error pattern in the case where m303 errors are considered and only errors up to 2 pits among them are corrected is expressed as the following equation.

Next, hard-decision demodulated data F'(x
F” obtained by adding the estimated error patterns expressed as (6) and (force, etc.) to l, respectively.
(Xl is expressed by the following formula.

F'(Xl=F(Xl×E(Xl×Ei(Xl ・
...... Song - (8) (i = 1~) Here, if the error pattern E (xl) that occurs on the transmission path is in Es (xl, then F'' (phantom is From the relationship in the equation, the transmission data string is F(xl), and error correction has been completed.

E(xl Bl (Xl = 0...
-Song...-(91F'(x) = F(xl
Song aO) If E, (xl contains E(x
), if there is no same thing as (B(xl + Ei(
It can be seen that the error correction was not possible because G(xi) could not be divided by G(xi) and there was a remainder.
Similar to the conventional ARQ method, a retransmission request is made to the transmitting side.

Here, the degree of deterioration of the error detection ability due to the error correction of the present invention will be described.

For example, if a Hamming code with a minimum distance of 4 obtained by an (n-k) order generator polynomial is used as an error detection code, the error correction will be performed using a method that does not detect errors in the error detector. The error detection ability is expressed by the following equation.

However, l indicates the number of estimated error patterns. Therefore, when l is small, error correction is possible without deteriorating the error detection ability.

FIG. 3 shows the calculation results (curve (b)) of the block error rate according to the present invention. A calculation example is shown for the case where n=1000, n-=16, /=6. The figure also shows the conventional block error rate (curve (a)). From the figure 8. /'N-to dB, the method of the present invention has a block error rate of about 3000 compared to the conventional method.
It can be seen that this has been improved by about twice as much.

Also, this method can be applied to 5elective Repeat
t ARQ method, 5ETRAN AR, Q method, Go-
A comparison of throughput characteristics (transmission efficiency) when applied to the Back-N ARQ method is shown in FIG.

In Fig. 4, the solid line (al is the conventional 5elective Re
The characteristics of the peat ARQ method, the black dots are the characteristics when the present invention is applied to this ARQ method, and the dotted line (b) is the characteristic of the conventional 8E
Characteristics of the TRAN ARQ method, X points are the characteristics when the present invention is applied to this ARQ method, dashed line (C) is the characteristics of the conventional Go-Back-NARQ method, and white points are the characteristics of this ARQ method.
These are the characteristics when the present invention is applied to the Q method. Furthermore, the fourth
In each graph in the figure, the number of response delay blocks N (the number of blocks to be retransmitted retroactive to when an error occurred) is N = 12.
It is 8. From FIG. 4, it can be seen that by applying the present invention, each ARQ
It can be seen that the throughput characteristics are significantly improved for both methods.

Next, an embodiment according to the present invention will be described.

FIG. 5 shows a schematic diagram of the receiving section of the present invention. The demodulator No. 51 performs an operation of making a hard decision on the received signal, as well as an operation of extracting an analog weight for each element, in the same way as a conventional demodulator. The analog weight storage section 52 stores the number of analog weights in descending order and the reception determination result at that time. The error pattern estimator 53 estimates an error bit pattern from the reception determination result of the element with a small analog weight obtained in 52. The error bit pattern estimated here is E, (Xl, B2(xi
, E, (X) in equation (7).

B2(XI, B, The remainder pattern synthesizer of 55 uses the remainder obtained in the father to calculate E, (x),
B in Equation (7), (xl -Es(XI, E, (xl) is the error bit pattern corresponding to G (x). are doing.

E, (x) −xfJ + X”2 −・・
・(121Es(xl / G(X) -Qrn, (X
) + Qm, (X) However, Qr, , (Xl , Qn
, 2(Xl is x1″l, Xm2 is G(xl
It is the quotient when divided by R,,, (xl, R□2(
x) is the remainder at that time. Therefore, E, (X) is G (
The remainder when divided by x) is independently EI TX), B2
(It is the sum of the remainders when dividing Xl by G(xl.

From this, in the 55 remainder pattern synthesizers, the remainders of all error pattern estimators corresponding to equation (6) have been found.

Guo's data storage unit stores one frame's worth of hard decision data. The remainder calculation unit No. 57 calculates the remainder when one frame's worth of hard-decision data code string is divided by G(xl. The judgment unit No. 59 calculates the remainder obtained from 55 and 57. This is a circuit that finds a remainder pattern that becomes 0 from the sum of the remainders. If there is no remainder pattern that makes the sum of the remainders O, the SW 61 is set to the b side and a retransmission request is sent to the transmitting side through 602. Also, when there is a remainder pattern that becomes 0, the SW 61 is set to the a side, and information about which pattern is output from the remainder pattern synthesizer 55 is output.In the estimated error pattern synthesizer 62,
All error patterns corresponding to equations (6) and (7) are combined, and one of them is selected from 59 pieces of information.

From this, it is possible to select a pattern that is the same as the error pattern E(x) that is thought to have occurred on the transmission path.

Next, the operation of equation (8) is performed by the adder 63, and the hard decision data is error-corrected based on the relationship of equation (9), and is sent to the decoder through 601 as demodulated data.

Since the present invention observes analog weights on an element-by-element basis, even if the modulator performs differential encoding, the
The error pattern estimator No. 3 can estimate error bit patterns over two elements.

For example, in the case of the synchronous detection differential 4-phase PSK method, assuming that when an error occurs in a certain element, it always occurs in the adjacent judgment area (in areas where S, /N is high, this type of error is most likely to occur). ), then there are only four error bit patterns over the two elements as shown below.

Similarly, in the case of synchronous detection differential 8-phase PSK, there are only 9 methods shown below.

Therefore, by looking at the hard decision results and the state of the analog weights, 15 error bit patterns can be easily created using a leap.

As described in detail above, the present invention is capable of detecting error-detected frames by simply adding simple circuits to the conventional ARQ1 demodulator and error detector. This is an error control method that can also perform error correction by using pre-judgment information of the received signal called analog weights, so it is possible to obtain a communication method with high reliability and transmission performance using a simple circuit.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an outline of the conventional ARQ method, FIG. 2 is a diagram showing the correlation between errors and analog weights at that time, and FIG. 3 is a diagram showing block error rate characteristics for S, /'N according to the present invention. 4 are diagrams showing throughput characteristics when the present invention is applied to various ARQ methods, and FIG. 5 is a schematic diagram showing an embodiment of a demodulator and an error detector according to the present invention. 51... Demodulator 52... Analog weight storage unit 53...
...Error pattern estimator patent applicant International Telegraph and Telephone Co., Ltd. Patent application representative Patent attorney Megumi Yamamoto −

Claims (1)

[Claims] On the transmitting side, the information data to be transmitted is block encoded with an error detection code, then modulated and sent to the communication channel, and on the receiving side, the received signal is demodulated to obtain reception judgment data, and each block of the reception judgment data is In an error control method that performs error detection and controls errors by requesting the transmitting side to retransmit blocks in which errors are detected, at least the analog information before decoding of the received signal is extracted when demodulating the received signal. One block is stored, and for a block in which an error has been detected, an error bit pattern is estimated using the analog information corresponding to the block, and an error detection means is applied to the incorrectly estimated error bit pattern to detect the estimation error. It is checked whether or not a bit pattern that is the same as an error bit pattern that occurred on the communication path exists in the bit patterns, and if it exists, the reception judgment data is controlled based on the estimated error bit pattern. An error control method characterized by correcting the error by using the block, and requesting the transmitting side to retransmit the block if it does not exist.