JPS5858630A - Dma function diagnosing method of centralized control system - Google Patents

Dma function diagnosing method of centralized control system

Info

Publication number
JPS5858630A
JPS5858630A JP56158486A JP15848681A JPS5858630A JP S5858630 A JPS5858630 A JP S5858630A JP 56158486 A JP56158486 A JP 56158486A JP 15848681 A JP15848681 A JP 15848681A JP S5858630 A JPS5858630 A JP S5858630A
Authority
JP
Japan
Prior art keywords
master station
storage device
main storage
dma
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56158486A
Other languages
Japanese (ja)
Inventor
Takao Watanabe
渡辺 孝雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56158486A priority Critical patent/JPS5858630A/en
Publication of JPS5858630A publication Critical patent/JPS5858630A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To diagnose a DMA operation through a system, and to detect an abnormal state exactly and quickly, by transmitting data stored in a master station side in advance, to a main storage device by a DMA mode, or the like. CONSTITUTION:Data stored in a master station 3 side in advance is transferred to a main storage device 5 by a DMA mode. For instance, control information to a slave station 11 is generated by a central operating unit CPU 1, is stored in the main storage device 5, and at the necessary time point, this control information is updated. Subsequently, a fetch request of contents of the main storage device 5 is sent out to a controller II 14 periodically from the master station 3, the information is read out from a stored address designated by the main storage device 5 through an extending bus 13, a controllerI12 and a memory bus 6, is inputted to the master station 3, and is turned back to a transmission processor 9 and is outputted. Subsequently, from the slave station 11, displaying information is sent out to the controller II 14 through the transmission processor 9 and the master station 3, a store address of the main storage device 5 is designated through the controllerI12, etc., and this displaying information is written.

Description

【発明の詳細な説明】 (1)発明の属する分野 本発明はシステム内に電子計算機を含み電子計算機の主
記憶装置と制御所側親局との間をDMA (/イレク′
トメモリアクセス)モードで結合して制御情報および表
示情報の授受を行なう集中制御システムにおけるDMA
機能診断方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (1) Field to which the invention pertains The present invention includes an electronic computer in a system, and uses DMA (/elect'
DMA in a centralized control system that sends and receives control information and display information by combining in memory access) mode
This invention relates to a functional diagnosis method.

(2)  従来技術およびその問題点 例えば、発変電所の集中制御において制御情報を電子計
算機から制御所監視制御装置を経由して被制御所へ伝送
し、また表示情報を被制御所から゛制御所監視制御装置
経由で電子計算機に伝送することが行なわれている。
(2) Prior art and its problems For example, in the centralized control of power generation and substations, control information is transmitted from a computer to a controlled station via a control center monitoring and control device, and display information is transmitted from a controlled station to a controlled station. The information is transmitted to a computer via an office monitoring and control device.

この″ように、電子計算機よシ複数の発変電所を遠隔制
御する場合、制御対象の被制御所が多数になると処理応
答速度の面から制御情報は電子計算機の主記憶部からD
MAモードで取出し、被制御所へ周期的に送信し、表示
情報は親局としての制御所側監視制御装置(以下「親局
」と称する)よりDMAモードで電子計算機の主記憶部
へ周期的に書込んでいる。この場合電子計算機および親
局の処理速度向上並びに分散処理化のためシステムダウ
ンの発生に極めてまれとなってはいるが、部分的ダウン
(故障)の検出および対処方法に関して高度な診断機能
が要求されている。従来この診断機能としてはデータの
74リティチェ、り程度の機能が付加されているが、親
局から電子計算機主記憶装置への情報書込方向あるいは
電子計算機主記憶部から親局への情報取出し方向のいず
れか一方向についての限定された異常検出にとどまって
いた。
In this way, when remotely controlling multiple power generation and substations using a computer, when the number of controlled stations increases, the control information is transferred from the computer's main memory to the computer in terms of processing response speed.
It is retrieved in MA mode and periodically transmitted to the controlled station, and the display information is periodically sent to the main memory of the computer in DMA mode from the control center side monitoring and control device (hereinafter referred to as "master station") as a master station. is written in. In this case, system downs are extremely rare due to improved processing speed of computers and master stations and distributed processing, but advanced diagnostic functions are required to detect and deal with partial downs (failures). ing. Conventionally, this diagnostic function has been added with a function equivalent to 74 litices of data, but it has been added in the direction of writing information from the master station to the computer main memory or in the direction of retrieving information from the computer main memory to the master station. Anomaly detection was limited to only one direction.

また異常を検出しても第1図に示すごとく計算機中央演
算部(以下r CPU Jと称する)1より出力回路2
を介して親局3側入力回路4で該異常検出の情報を受け
るためDMA転送1回毎の検出フィードバックは時間的
に不可能であり長期の異常継続のみが検出可能であるに
すぎなかった。
Furthermore, even if an abnormality is detected, as shown in Fig. 1, the computer central processing unit (hereinafter referred to as r CPU
Since the input circuit 4 on the side of the master station 3 receives information on the detection of the abnormality via the input circuit 4 on the master station 3 side, it is impossible to provide detection feedback for each DMA transfer due to time constraints, and only long-term continuation of the abnormality can be detected.

なお、第1図において、5は電子計算機の主記憶装置、
6はメモリパス、7はDMAコントローラ、8F111
0(入出力)パス、9は伝送処理装置、10は伝送路、
11は子局である。
In addition, in FIG. 1, 5 is the main memory of the computer;
6 is memory path, 7 is DMA controller, 8F111
0 (input/output) path, 9 is a transmission processing device, 10 is a transmission path,
11 is a slave station.

(3)発明の目的 本発明はシステムを通してDMA動作の診断が行なえ確
実に且つすみやかに異常検出が行なえる集中制御システ
ムにおけるDMA機能の診断方法を提供することを目的
としている。
(3) Purpose of the Invention The object of the present invention is to provide a method for diagnosing a DMA function in a centralized control system, which allows DMA operation to be diagnosed through the system and abnormalities to be detected reliably and promptly.

(4)発明の構成 、本発明は、システム内に電子計算機を含み電子計算機
の主記憶装置と制御所側親局との間’i DMAモード
で結合して制御情報および表示情報の授受を行なう集中
制御システムにおけるDMA機能診断方法において、前
記親局側からオンラインで且つ予定周期で予め親局側に
記憶さ    ゛れたデータをDMAにより前記主記憶
装置内の予定のエリアに転送ししかる後に直ちに再びD
MAにより該データを読み出し前記親局、側に転送して
先に送出した原データとの異同を判定してDMA機能の
診断を行なうことを特徴としている。
(4) Structure of the invention The present invention includes an electronic computer in the system, and connects the main storage device of the electronic computer and a control center side master station in 'iDMA mode to exchange control information and display information. In a DMA function diagnosis method in a centralized control system, data previously stored in the master station online and at scheduled intervals is transferred from the master station to a scheduled area in the main storage device by DMA, and then immediately thereafter D again
The MA is characterized in that the data is read out by the MA, transferred to the master station, and the DMA function is diagnosed by determining whether it is different from the previously sent original data.

(5)発明の実施例 第2図に本発明の一実施例のシステム構成を示す。(5) Examples of the invention FIG. 2 shows a system configuration of an embodiment of the present invention.

本実施例のシステムは図示の、ごとく電子計算機のCP
U 1と、主記憶装置5と、この間を結合するメモリパ
ス6と、前記主記憶装置!i5の内容をDMAモードで
取出すためのメモリ・守スアダプタ(以下「コントロ1
うI」と称する)12と、延長用パス13と、この延長
用ノ々ス13を介してコントローラII、?と結合され
る親局側・々スアダグタ(以下「コントローラ■」と称
する)14と、マイクロコンビ、−夕を用いて構成した
親局3によっ、てコントローラ■14経由で情報を授受
するためのI10パス8と、同・々ス8を介して情報が
与えられ伝送路11を介して゛複数の被制御所側遠方監
視制御装置(以下「子局」と称する)11への制御用情
報の送信および子局11からの表示用情報の受信を行な
う伝送処理装置9とから構成される。
The system of this embodiment is a CP of an electronic computer as shown in the figure.
U1, the main storage device 5, the memory path 6 connecting these, and the main storage device! A memory/protection adapter (hereinafter referred to as "Control 1") for extracting the contents of the i5 in DMA mode.
) 12, an extension path 13, and a controller II, ? A master station side adapter (hereinafter referred to as "controller ■") 14 coupled to a master station side adapter (hereinafter referred to as "controller ■") 14, and a master station 3 configured using a microcombi, Information is given through the I10 path 8 and the I10 path 8, and the control information is transmitted to a plurality of controlled station-side remote monitoring and control devices (hereinafter referred to as "slave stations") 11 via the transmission line 11. and a transmission processing device 9 that receives display information from the slave station 11.

以下上述の構成における動作について説明する。The operation of the above configuration will be explained below.

第2図におけるCPU 1は子局11に対する制御情報
を作成し主記憶装置5の特定エリアに格納し必要時点で
この制御情報を更新する。親局3は周期的にコントロー
ラ114に対して主記憶装置5内の格納番地を指定し取
出し要求をかけ、これを受けてコントローラU14はC
PU 1の動作タイミングを考慮し、延長用パス13と
コント四−ラ12とメモリパス6を経由して主記憶装置
5内の指定する格納番地より情報を読出し、逆ルートす
なわちメモリパス6およびコントローラ■12から延長
用パス13とコントローラn14とを経由して親局3へ
取込み、コードチェ、りを実施して伝送処理装置9へ折
返し出力している゛、また、子局11からの表示用情報
は親局伝送処理装置9から親局3を経由してコントロー
ラ′■14に対して伝送の周期に同期するタイミングで
主記憶装置5内の格納番地を指定して書込要求をかけ、
これを受けてコントローラU141rlCPIJ1の動
作タイミングを考慮して延長用パス13とコントローラ
112とメモリパス6を経由して主記憶装置15内の指
定する番地へ前記表示用情報を書込む。
The CPU 1 in FIG. 2 creates control information for the slave station 11, stores it in a specific area of the main storage device 5, and updates this control information when necessary. The master station 3 periodically requests the controller 114 to specify a storage address in the main memory 5 and request the controller 114 to retrieve the data.
Considering the operation timing of the PU 1, information is read from the specified storage address in the main storage device 5 via the extension path 13, the controller 12, and the memory path 6, and then the information is read out from the specified storage address in the main storage device 5 through the reverse route, that is, the memory path 6 and the controller. 12 to the master station 3 via the extension path 13 and the controller n14, performs a code check, and outputs back to the transmission processing device 9. Also, for display from the slave station 11. The information is sent from the master station transmission processing device 9 via the master station 3 to the controller 14 by designating a storage address in the main storage device 5 at a timing synchronized with the transmission cycle and issuing a write request.
In response to this, the display information is written to the specified address in the main storage device 15 via the extension path 13, the controller 112, and the memory path 6, taking into consideration the operation timing of the controller U141rlCPIJ1.

このようにして、親局3より主記憶装置5へDMAモー
ドで情報をアクセスする場合、情報の転送方向は、親局
3から主記憶装置5へ向う方向と主記憶装置iから親局
3へ向う方向のごとく二方向に分けられ、制御用情報と
表示用情報は各々独立する一方向の情報転送となる。
In this way, when accessing information from the master station 3 to the main storage device 5 in DMA mode, the information transfer direction is from the master station 3 to the main storage device 5 and from the main storage device i to the master station 3. It is divided into two directions, such as the direction toward the other side, and the control information and display information are each independent unidirectional information transfers.

そこで第3図に示すごとく、主記憶装置5の中に診断専
用エリア(以下「診断エリア」と称する)E7を制御用
情報および表示用情報の格納エリア(以下「通常エリア
」と称する)E2と区別して設け、例えば一定周期ごと
に親局例えば第2図の親局3の記憶回路31に診断用情
報を予め用意し、前記表示用情報と同様コントローラ[
14より主起−憚装置5内の診断エリアE)へ記憶回路
31の情報を書込み、次に診断エリアE1の記憶内容を
前記制御用情報と同様に主記憶装置5からコントローラ
■14を介して親局3の記憶回路32へ取込み排他的論
理和回路33により演算し結果をフリ、デフロ、!回路
34へ入力させ記憶回路32ヘデータを取込んだタイミ
ングでフリ、デフロ、デ回路74への入力取込制御信号
Cを活性化し排他的論理和回路33の出力が10”でな
いすなわち主記憶装置5への書込情報と主記憶装置5か
らの取出し情報が一致しなかった場合は、何らかの異常
が発生し友ものであるから警報出力Aを′1”として警
報あるいは制御情報の子局への送信停止等の処理を実行
する。
Therefore, as shown in FIG. 3, a diagnosis-only area E7 (hereinafter referred to as the "diagnosis area") in the main storage device 5 is combined with an area E2 for storing control information and display information (hereinafter referred to as the "normal area"). For example, diagnosis information is prepared in advance in the storage circuit 31 of the master station 3 in FIG. 2 at regular intervals, and the controller [
14, the information in the memory circuit 31 is written to the diagnostic area E) in the main storage device 5, and then the stored contents of the diagnostic area E1 are written from the main memory device 5 via the controller 14 in the same way as the control information. It is taken into the memory circuit 32 of the master station 3 and calculated by the exclusive OR circuit 33, and the result is free, deflo,! At the timing when the data is input to the circuit 34 and taken into the memory circuit 32, the input take-in control signal C to the free, defro, de circuit 74 is activated, and the output of the exclusive OR circuit 33 is not 10'', that is, the main memory 5 If the information written to the main memory 5 does not match the information retrieved from the main memory 5, it means that some abnormality has occurred and the alarm output A is set to '1' and the alarm or control information is sent to the slave station. Executes processing such as stopping.

なお上述の実施例は一定周期で診断を実行するものであ
るが、連続した情報を主記憶装置5へ誉込む場合情報の
連続性すなわち一部の情報が転送異常のため関連する情
報が総て意味をなさなくなる性質を特つ情報のDMA書
込みなどの場合、従来書込側からチェックすることは不
可能に近い状態であったが、前記情報を書込む都度その
情報に対して上述の診断を実行することによりより高度
な診断を実現することが可能である。これは、第3図の
記憶回路31および32の容量を増加させ、診断エリア
Elf通常エリアE2に設定するのみで容易に実現する
ことが可能である。
Although the above-mentioned embodiment executes diagnosis at regular intervals, when continuous information is transferred to the main storage device 5, the continuity of the information, that is, some information is transferred abnormally, so all related information is In the case of DMA writing of information that has a characteristic that makes it meaningless, it has conventionally been nearly impossible to check from the writing side, but it is now possible to perform the above-mentioned diagnosis on the information each time it is written. By executing this, it is possible to realize more advanced diagnosis. This can be easily achieved by simply increasing the capacity of the memory circuits 31 and 32 shown in FIG. 3 and setting the diagnostic area Elf to the normal area E2.

このようにすれば、複雑なロジックシーケンスにより高
度で且つ高速な処理機能を達成しているDMA方式の情
報転送に診断機能を付加することができ、従来検定不可
能であった異常に対しても、システムを通しての検定が
オンラインで可能となり、発変電所集中制御のごとく極
めて高い信頼度の要求されるシステムに対し効果が大き
い。
In this way, a diagnostic function can be added to DMA information transfer, which achieves advanced and high-speed processing functions through complex logic sequences, and can also be used to detect abnormalities that were previously impossible to test. , system verification can be done online, which is highly effective for systems that require extremely high reliability, such as centralized control of power generation and substations.

なお、本発明は上述し且つ図面に示す実施例にのみ限定
されることなくその要旨を変更しない範囲内で種々変形
して実施することができる。
Note that the present invention is not limited to the embodiments described above and shown in the drawings, but can be implemented with various modifications without changing the gist thereof.

例えば、上記実施例においては親局側の診断機能をハー
ドウェアで実現するものとして説明したが、親局側にお
いてソフトウェアでこれを実現するようにしてもよい。
For example, in the above embodiments, the diagnostic function on the parent station side was described as being implemented by hardware, but it may also be implemented by software on the parent station side.

(6)発明の効果 システムを通してDMA動作の診断が行なえ確実に且つ
すみやかに異常検出が行なえる。
(6) Effects of the Invention Diagnosis of DMA operation can be performed through the system, and abnormality can be detected reliably and quickly.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の集中制御システムの構成を示すシステム
構成図、第2図は本発明の一実施例による集中制御シス
テムの構成を示すシステム構成図、第3図は同、実施例
の診断機能構成の要部を説明するための図である。 1・・・中央処理装置(CPU)、3・・・制御所側監
視制御装置(親局)、4・・・主記憶装置、6・・・メ
モリパス、8・・・入出力パス(I10パス)、9・・
・伝送処理装置、10・・・伝送路、11・・・被制御
所側遠方監視制御装置(子局)、12・・・メモリパス
アダプタ(コントローラI)、13・・・延長用パス、
14・・・親局側ノ童スアダゾタ(コントローラ■)。 第1図 第2図
Fig. 1 is a system configuration diagram showing the configuration of a conventional centralized control system, Fig. 2 is a system configuration diagram showing the configuration of a centralized control system according to an embodiment of the present invention, and Fig. 3 is a diagnostic function of the same embodiment. FIG. 3 is a diagram for explaining the main parts of the configuration. 1... Central processing unit (CPU), 3... Control center side monitoring and control device (master station), 4... Main storage device, 6... Memory path, 8... Input/output path (I10 pass), 9...
- Transmission processing device, 10... Transmission path, 11... Controlled station side remote monitoring and control device (slave station), 12... Memory path adapter (controller I), 13... Extension path,
14... Parent station side child suadazota (controller ■). Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] (1)  システム内に電子計算機を含み電子計算機の
主記憶装置と制御所ill親局との間をDMA(ダイレ
クトメモリアクセス)モードで結合して制御情報および
表示情報の授受を行なう集中制御システムにおけるDM
A機能診断方法において、前記親局側からオンラインで
且つ予定周期で予め親局側に記憶されたデータをDMA
により前記主記憶装置内の予定のエリアに転送ししかる
後直ちに再びDMAにより該データを読み出し前記親局
側に転送して先に送出した原データとの異同を判定して
DMA機能の診断を行なうことを特徴とする集中制御シ
ステムにおけるDMA機能診断方法。 (2、特許請求の範囲第1項記載の集中制御システムに
おけるDMA機能診断方法において、DMA機能の診断
を親局から主記憶装置への情報転送の都度実施すること
を特徴とする集中制御システムにおけるDMA機能診断
方法。
(1) In a centralized control system that includes a computer in the system and connects the main memory of the computer and the master station of the control station in DMA (direct memory access) mode to exchange control information and display information. DM
In the function diagnosis method A, data stored in advance on the master station side is transferred online from the master station side at scheduled intervals via DMA.
The data is then transferred to a scheduled area in the main storage device, and then immediately read out again using DMA and transferred to the master station to determine whether it is different from the original data sent earlier and to diagnose the DMA function. A DMA function diagnosis method in a centralized control system, characterized in that: (2. In the DMA function diagnosis method in a centralized control system according to claim 1, the DMA function diagnosis is carried out each time information is transferred from the master station to the main storage device. DMA function diagnosis method.
JP56158486A 1981-10-05 1981-10-05 Dma function diagnosing method of centralized control system Pending JPS5858630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56158486A JPS5858630A (en) 1981-10-05 1981-10-05 Dma function diagnosing method of centralized control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56158486A JPS5858630A (en) 1981-10-05 1981-10-05 Dma function diagnosing method of centralized control system

Publications (1)

Publication Number Publication Date
JPS5858630A true JPS5858630A (en) 1983-04-07

Family

ID=15672787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56158486A Pending JPS5858630A (en) 1981-10-05 1981-10-05 Dma function diagnosing method of centralized control system

Country Status (1)

Country Link
JP (1) JPS5858630A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159558A (en) * 1984-08-30 1986-03-27 Fujitsu Ltd Dma diagnosis system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159558A (en) * 1984-08-30 1986-03-27 Fujitsu Ltd Dma diagnosis system
JPH022176B2 (en) * 1984-08-30 1990-01-17 Fujitsu Ltd

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