JPS5856500A - Wiring system for multilayer printed board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wiring method for a multilayer printed board used for wiring assembly of electrical equipment.

2. Description of the Related Art In recent years, with the development of semiconductors, the circuit configurations of electronic devices have become faster and more dense, and advanced technology is also required for the wiring and mounting methods of the electrical devices. In particular, it is required for so-called printed boards, etc., which are loaded with highly integrated semiconductors and used for wiring, forming wiring conductors on synthetic resin film or ceramic sand, and compounding parts. The performance is infinitely the same.

Conventionally, in order to attach semiconductors and other parts to these printed boards and interconnect component terminals, a square lattice of, for example, 2.54-pictures is assumed based on orthogonal coordinates, and a grid is placed on any intersection point of the lattice. A through-hole land (hereinafter abbreviated as THP) is provided to serve as a relay terminal for parts mounting, wiring, and interconnection between multiple layers, and wiring conductors placed on the surface of each insulating board are placed between the THPs on the X-axis and The THPs were interconnected as being parallel to the axis.

Fig. J1 (a) shows a perspective view of the separated configuration of a conventional multilayer printed fabric with line layers between the X and Y axes. In Figure 1, 1 is TH
P and 2 are wiring, and 3 is an insulating plate. Normally, when the layers are divided along the X and Y axes, the P of any THPl is determined as shown in the wiring route model diagram of FIG. 1(b).

As a general rule, the wiring that electrically connects between
Divided into axis-parallel lines, their intersections are used as relay points R or R', and the wiring is divided into P-R, R-Q or p-R', R'-Q, and the respective X and Y axes are aligned. Select the shortest distance connecting two given points in the layer. Therefore, the wiring routes in each of the X- and Y-axis wiring layers are mainly parallel to the X or Y-axis to increase the wiring density, and are supplemented by orthogonal coordinates in the finishing wiring direction perpendicular to the X- or Y-axis parallel lines. T seen in ff1ltl of THPl
The diagonal line segments in the HP connection part are shown in Figure 2 (a) and (b).
As shown in the wiring pattern diagram of
Unless directly connected on the PI grid, THPt and THP
After obtaining the designed wiring by selecting a wiring route in the lattice band that runs avoiding l, the orthogonal route part around THPl is β =
w-' 1 ti'FWt/1KIXf y)P/l'
4r) 11. F7f hi) or p = bar'-1
For example, to connect THPla, b with a line segment, connect line segment AB&THP1a, b with A a e B
This is what was obtained and outputted as artwork data for the actual wiring during printed board production. Also TH
When selecting P and wiring routes, etc., please refer to Figure 1 (a).
), all the wiring 2 is arranged and processed on the top surface of each insulating board 3, and in actual manufacturing, as shown in the laminated cross-sectional view of a conventional multilayer printed board shown in FIG. 3, for example, synthetic resin is used. For example, wires 2 (X, , Y, and X, , Y) are arranged on both sides of substrates 2a and 2b laminated with impregnated cloth or paper, and an insulating synthetic resin layer 4 that also serves as adhesive is separately inserted to form a sandwich. They are stacked and heat bonded under pressure to form an integrated multilayer printed board. Therefore, the artwork data for the 78 layers and the Y layer, which are manufactured upward from the bottom surface, are output from the top downward and then turned over for use. In the following, all explanations of the present invention will be made with the transparent orientation at the time of manufacture. Regardless of the angle of view, the test is performed in a closed position as shown in Figure 1 when viewed from one direction.

Conventionally, as a means of obtaining higher density wiring, as shown in the perspective view of the separated structure of a multilayer printed board in FIG. The only options were to increase the number of wiring layers in the same direction or increase the number of wiring layers in the same direction. Also, it is desirable to keep #7J#wJsrwn between two points as small as possible in terms of efficiency, but as the wiring density increases, the number of wirings that extend over three or more layers via multiple THPt- increases, and other wiring This created a vicious cycle in which the usage efficiency of the wiring surface decreased synergistically. As a result,
For example, since these wirings are planar conductors, the frequency of close parallel planes of 90.2 to 0.4 fins per layer increases, especially in the stacking direction, resulting in an increase in the capacitance between the wirings. , and had the disadvantage of causing undesirable phenomena such as crosstalk. In order to prevent this capacitive coupling, it was necessary to insert an extra wide flat conductor ground layer, which is not used for wiring, between these wiring layers.

The present invention seeks to eliminate this drawback. Therefore, the present invention provides a multilayer printed board wiring system in which through-hole lands arranged on orthogonal lattice intersections are connected by printed board wiring arranged on a plurality of insulating substrate surfaces, using a plurality of X-axis parallel wiring layers.

A Y-axis parallel wiring layer and a plurality of diagonal wiring layers having a certain angle with them are provided, and one plane or one relay through-hole land and two relay through-hole lands provide a shorter path for connecting arbitrary through-hole lands. Oblique plane or/and X or Y
The combination of directional wiring layers is arranged weekly according to the diagonal angle of the line segment connecting arbitrary through-hole lands, and common wiring procedures and processing are performed using independent orthogonal coordinates for all wiring layers, including diagonal wiring layers. This feature is characterized in that the wiring is selected by the following.

An embodiment of the present invention will be described below with reference to the drawings. In the present invention, in addition to the conventional X-axis wiring layer (hereinafter referred to as "X layer") and Y-axis wiring layer (hereinafter referred to as "Y layer"), there are The angles they make with the X and Y axes, respectively! =tl
! 114 are provided, and are respectively called a T-axis wiring layer (hereinafter referred to as 1 layer), a U-axis wiring layer (hereinafter referred to as U layer), a v-axis wiring layer (hereinafter referred to as 7 layers), and a W-axis wiring layer (hereinafter referred to as W layer). ) and each x, y
.

The wiring routes in the T, U, V, and W layers are mainly formed by line segments parallel to each axis, followed by line segments perpendicular to each axis. Figure 5 shows X, Y, and T.

FIG. 2 shows a perspective view of an isolated construction of a multilayer printed board with U, V and W layers. The layers are W, U, X, Y, V, and T from the top. FIG. 6 shows a cross-sectional view of the laminated layers, and in FIGS. 5 and 6, 1 is THP as in the conventional case.

2 is a wiring, 3 is an insulating layer, and 4 is a synthetic resin layer. Note that in the wiring shape shown in Figure 5, the route of the diagonal wiring layer is zigzag, but as shown in the wiring route diagram at the time of design for the diagonal wiring layer in Figure 7, the processing work is done in a straight line. Then, in order to output artwork data for use in printed board production through a conversion process to be described later, a conversion is performed as shown in the wiring route diagram after conversion in the diagonal wiring layer in FIG. 8. Here, the means and procedure for connecting arbitrary 21M) using the X, Y, T, U, V and W layers to obtain designed wiring and practical wiring are as follows.

The ninth figure is a diagram of an embodiment of the present invention, and the tenth figure is a diagram of an embodiment of the present invention.
The figure shows the work procedure diagram. In FIG. 9, 10 is a control section, 20 is a processing circuit, 21 is a wiring layer selection section, and 22 is a relay T.
23 is a wiring route selection unit; 24 is a wiring route conversion unit; 30 is a recording circuit; 31 is a wiring data storage area;
2 is a THP storage area, 33 is a wiring route storage area, and 34 is an artwork route storage area. The control section 10 controls each section of the processing circuit 20 and the recording circuit 30, and outputs connection data received from the outside as artwork data necessary for actual printed board production. The valleys of the processing circuit 20 correspond to each area of the recording circuit 30 and sequentially process individual connection data according to instructions from the control unit 10 to obtain designed wiring, and then create the required art according to a predetermined procedure. Obtain work data.

The connection data area 31 temporarily stores connection data for all sections to be wired, such as between semiconductor and other component terminals.

The THP storage area 32 stores all THP positions common to each layer constituting the printed board, and stores all THP positions according to the S type of the printed board, such as for parts bins and relays, and at the time of selection procedure. Display the usage status of the site so that it can be identified.

The wiring route storage area 33 stores wiring routes for each layer that can be provided for wiring determined by the type of printed board, and displays the usage status at the time of the corresponding selection procedure so that the wiring route can be identified. The storage unit is THP bidachi.

The artwork route storage area 34 stores and provides an execution wiring pattern converted by the conventional wiring route conversion unit 24 according to predetermined rules for T)(P connection parts or straight line displayed design wiring). .

It also temporarily stores the completed wiring pattern.

Next, the wiring procedure will be explained according to the work procedure diagram shown in FIG.

The wiring layer selection unit 21 selects one wiring layer or a combination of two wiring layers from among the X, Y, T, U, V, and W layers, which is given by the wiring data storage area 31 in response to an instruction from the control unit 10. Select. The wiring layer to select is determined by the oblique angle that the line segment connecting the given sections to be wired makes with the X axis.If the angle that line segment AB in Fig. 4 makes with the X axis is α', then α is According to the changes, the selection is made as shown in the following table.

Note that even if a combination of two layers is selected based on this table, the relay T
Depending on the HP selection, it may be omitted to 1 layer, and
Even if the first priority is selected to minimize the wiring length, the relay THP or wiring route described may be used and cannot be used due to the work procedure in another preceding wiring section. In order to obtain the shortest possible wiring length, it is possible to select m groups, for example, 5 groups, in descending order of wiring length, and if a result is not obtained after using the procedure 5 times, it is determined that wiring is impossible with a combination of two layers. Become. In this case, processing is performed using a combination K of three or more layers.

Note that the wiring length between arbitrary THPs is given by the following equation, assuming that the coordinates of A and B are A(xa, ya) B(xb, yb), respectively. However, the difference between both coordinates X=X&~x11e)'=7
If we set m-7b, 211 14-x+cf's -2) 7b point becomes <TAV
When it's inside.

21-2 L1 Tokai/3(x+y) When point B is within <UAW.

21-3 Ls, = (y'g -2')x+yB point is <
When in the UAW.

Next, the relay THP selection unit 22 selects a relay THP. Connect T as shown in the relay position coordinates in Figure 11.
Indicates when HPBr is <WAX.

Two points of equal value are obtained for the calculated relay points at cl and C8. As shown in the other relay position coordinates in FIG. 12, an example is shown in which THPBm to be connected is <UAVK. Similarly 2
relay points D□ and D! is obtained.

The respective coordinates are as follows.

22-I C, coordinates X@1-X ''*-2('Ib1-3'') *F
el ”-Yk22-20! Coordinates X@1 = xa+2 (7kl -7b )* )'s
t = Vbr22-3 DI coordinates Xds = ”/1 (-xa+4xb, +2ya-
2yb,))'ds = V3 (-2X*+2Xb
2+4'la-'Ib y)22-4 Dm coordinate x'! = ”/4 (-x h snow + 4 x
a+yb! -21m)ya,: bet (-
xb, +2x*+4yb, -ya) Here, THP is on the orthogonal coordinates, so 01. c! , DI or RI, if the coordinate values do not match those of THP, the nearest TH
Either select P, or make the next best selection in the direction of shortening the wiring length using a plurality of adjacent THPs. In this way, the relay THP selection unit 22 accesses the THP storage area 22 for n THPs, for example, 4 each, close to both calculated coordinates, and if there is no usable THP, the wiring layer selection (
3), select the next wiring layer combination, and select THP.

Further, the wiring path selection unit 23 accesses the wiring path 33 and selects a wiring path, using the relevant layer and the starting and ending points THP (pins for components, relays) of the wiring path as conditions. If an available wiring route cannot be selected, select relay THP again (part)
Return to , select the next available relay THP, and repeat the wiring route selection.

If the wiring route has been selected, the process returns to the next wiring data and repeats the selection procedure for the next wiring section until the entire line section is completed.

4X, Y when selecting a wiring route in a diagonal wiring layer
As with the conventional principle using only the axial line layer, the line segment in the main wiring direction of the core layer is still selected based on the shortest distance connecting two given points in the same layer.

In this way, if the wiring route is selected according to the preparation procedure shown in Figure 10, individual wiring connections can be easily made even in a configuration including diagonal wiring layers using the same work procedure as the conventional wiring route using X and Y layers. A wiring route can be obtained for the data.

Note: In the above work procedure, the diagonal wiring layers of the T, U, V, and W layers are explained as straight lines, but in the printed board to be manufactured, the wiring route has a certain width, and the contact with the THP or the insulation interval is To avoid narrowing, it is necessary to bend as shown in Figure 8.

The wiring route conversion unit 24 converts the wiring route in the diagonal wiring layer into a predetermined execution wiring pattern as shown in FIG. 8 from the straight line as shown in FIG. 7 obtained by the above procedure to the artwork route storage area 34. is accessed, converted into a final pattern, and temporarily stored in another part of the artwork path storage area 34. Note that the diagonal line segments connected to the THPs, which are the starting and ending points of the wiring route, are also converted.

The final pattern temporarily stored in another part of the artwork path storage area 34 is output as artwork data according to access by the control unit IO.

As described above, according to an embodiment of the present invention, compared to a conventional printed board with only X and Y layers, the wiring connecting two THPs is divided into three or more layers by introducing a diagonal wiring layer. Since most of the wiring can be consumed in one or two layers without any problems, the efficiency in using the wiring surface increases. In addition, crosstalk caused by parallel conductors can be reduced without inserting a ground layer, etc., and desired wiring can be obtained simply by processing procedures that follow orthogonal coordinates common to each layer, including multiple diagonal wiring layers. This is useful because it allows you to

[Brief explanation of drawings]

Fig. 1(a) is a perspective view of the separated configuration of a multilayer printed circuit board with conventional X and Y axis layers, Fig. 1(a) is a wiring route model diagram, Fig. 2(a), Cb) Company wiring pattern y Figure 3 is a cross-sectional view of conventional multilayer printing go lamination, Figure 4 is a wiring direction diagram of a multilayer printed board according to an embodiment of the present invention, and Figure 5 is a separation diagram of a multilayer printed board according to an embodiment of the present invention. A perspective view of the configuration, FIG. 6 is a cross-sectional view of a multilayer printed board according to an embodiment of the present invention, FIG. 7 is a wiring route diagram at the time of design in the diagonal wiring layer, and FIG. 8 is a diagram after conversion in the diagonal wiring layer. Fig. 9 is a wiring route diagram of an embodiment of the present invention, Fig. 10 is a work procedure diagram of an embodiment of the present invention, Fig. 11 is an example of relay position coordinates,
FIG. 2 shows another example of relay position coordinates. 1 is through hole land (THP), 2 is wiring, (#)
) Spear 4 figure Y Spear 7 figure 7y 2 /ffJ Palm figure

Claims (1)

[Claims] In a multilayer printed board wiring system in which nine through-hole lands arranged on orthogonal lattice intersections are connected by printed wiring arranged on a plurality of insulating plates, a plurality of X'-axis parallel wiring layers, Y-axis parallel wiring layers, and the like are used. A plurality of diagonal wiring layers having a certain angle are provided on one surface or #1 through-hole land for relay and diagonal or / Select the combination of xt or Y-axis parallel wiring layers according to the oblique angle of the line segment connecting arbitrary through-hole lands, and use a common wiring procedure using orthogonal coordinates for all wiring layers including the oblique wiring layer. A wiring method for a multilayer printed board, characterized in that wiring is selected by processing.