JPS5850608A - Reproducing device for acoustic signal - Google Patents

Abstract

PURPOSE:To obtain faithful reproduced sounds without the influence of wow and flutter by correcting the distortion with time occurring in the wow and flutter generated with a sound repeoducer such as a tape recorder or a VTR simultaneously with the compressing and expanding of time axis. CONSTITUTION:The input signal to an input terminal 11 is converted to digital codes by an A-D converter incorporating a sample holding circuit. The codes are assigned by a writing address circuit 19 and are stored and an RAM 14. R/W is controlled by an R/W selecting circuit 22, and addresses are selected by a multiplexer 23. A writing clock circuit 13 is a voltage controlling oscillator VCO which responds to an LPF 26 for smoothing the output of a phase comparator 25 by the input of the pulses proportional to the revolving speeds of a variable speed motor 24, and the output thereof constitutes the PLL to be inputted as a comparison signal of the comparator 25 via a frequency dividing circuit 27 of a frequency dividing ratio N. When the revolving speed of the motor 24 is defined as V, the oscillation frequency f1 of said VCO is f1=KNV (K is a constant), and sounds which are unaffected by wow and flutter are obtained.

Description

[Detailed description of the invention] The present invention relates to an audio signal reproducing device.

More specifically, the present invention relates to a time axis in which the time axis of an audio signal reproduced by a variable speed tape recorder or the like at a reproduction speed different from the recording speed is converted so that the frequency of the reproduced signal becomes equal to that of the recorded signal. This invention relates to a companding circuit, and particularly provides a new circuit device that corrects temporal distortion caused by distortions that occur in audio playback devices such as tape recorders and VTRs at the same time as time axis companding. When playing back an audio signal using a recording medium such as a tape recorder, you may want to change the playback speed to the recording speed.In this case, naturally, the same wave number structure of the playback audio signal is ) and the recording speed (VR) (vp/VRK).
is x (vp/VR-,f), but if this value becomes large, the reproduced audio signal becomes extremely difficult to hear or becomes inaudible. Therefore, even if the playback speed changes and the playback time becomes longer or shorter, it is necessary to make sure that the frequency structure of the audio signal does not change, that is, the pitch of the sound does not change. It is well known that such a circuit device is called a time axis compression/decompression device.

As a relatively simple method for compressing and expanding audio signals using electronic circuits, we will explain the principle of a known method using sampling technology using Figure 1. The audio signal whose axis has changed is input to the input terminal (1), is sampled by the sampling clock of the same wave number (fl) given from the sampling clock generator (3) via the LPF (21), and is stored in the storage capacity Fjl!f4). be remembered. Next, it is read out according to the read tally (frequency f2) from the second clock generator (5), and is outputted from the output terminal (output terminal) via the LPF (6). If the ratio of the readout tarokk (fl) to the recording/reproducing speed ratio vp/vR is set equal to the recording/reproducing speed ratio vp/vR, that is, if "/f2=vp/VR=ill," the audio signal at the input terminal (1) is The time axis #-i is corrected, and a reproduced signal with the same wave number structure as the recording signal is obtained at the output terminal (7).
Brigade Device) and CCD (Ch
(argeCoupled Device)% The audio signal processed using this method, which uses analog memory such as capacitor memory or digital memory such as RAM*, has its time axis expanded or compressed with short time synchronization. /vR〉1, i.e., in the case of high-speed reproduced audio signals, short intervals (usually 20 to 30 m5
), part of each speech fragment is discarded, and the remaining part is time-stretched and becomes a reproduced sound with the same frequency as the original sound (bell signal). Fortunately, there are many basic syllables that make up human conversation. Since it has redundancy and sufficient duration, even if some of it is missing, the information H will not be lost to a certain extent.vp/v,
(1) In the case of low-speed playback, the audio piece is compressed in time, so it must be manipulated and used to fill in the gaps.In addition, in Figure 1, the filter (2) on the input side is The filter (6) on the output side is necessary to remove unavoidable aliasing noise in the seed sampling circuit, and the filter (6) on the output side is necessary to remove high frequency signal components when they appear in the output sample value sequence of the storage circuit (4). When an electronic circuit based on this principle is used in an audio playback device with a variable playback speed, such as a variable speed cheap recorder, the speed of the playback drive motor is controlled by 1. At the same time, the +11 equation The wave number between the clocks (
fl) or (fl).According to the partial sampling theorem, the frequency bands VC, V of the reproduced signal
It is determined by the i readout tarlock frequency (fl), and is less than half of that.In practice, set (fl) to a constant value,
It is normal to change the writing tarokk (fl) according to the motor speed. This range of variation is the minimum and maximum speed when the playback speed ratio of a variable speed tape recorder is set to 6 times the high speed side and 1/3 the low speed side. The ratio is actually 9 times. A large speed control ratio like this would be extremely harsh for small motors used in consumer equipment such as Cheap Recog. This type of small motor uses a 7 rye wheel to absorb rotational unevenness. However, from the point of view of motor starting torque, there is a demand for the moment of inertia of the 7-wheel to be as small as possible, and on the other hand, the moment of inertia must be increased as the rotation speed decreases.These contradictory demands As a natural result of
A variable speed motor with such a large governing ratio will noticeably increase wow and flutter in the low speed range. Figure 2 is an example of measuring a 7-speed machine.The work flutter at 1/2 speed is about twice the rated speed.The measurement method shown in Figure 2 is based on JIS C5551-1971. Yes, lol
The present invention corrects the wobble and flutter of the variable speed motor using a circuit.
When sampling the audio signal and writing it into the memory circuit (4), the temporal distortion of the audio signal (due to wag flutter) is corrected by correcting the sampling interval according to the amount of wakku occurring at that time. Next, the present invention will be explained in detail with reference to FIG. 6. FIG. 5 shows an example in which a portion corresponding to the storage circuit (4) in FIG. 1 is configured with a digital memory.

The input signal of input terminal αυ passes through LPFQ3 on the input side,
It is converted into a digital code by the A-D converter a8 in the sample and hold circuit, specified by the write address circuit α, and stored in the RAM Q4). Sampling and A
-D conversion is the frequency (fl) of tarok circuit 03, which will be described later.
In the case of a write tally pulse (convert command pulse), the write address circuit αcJ written in IrJ is composed of a counter that counts the write tally (f,). The data at the address specified by the read address circuit (2) which counts the clock according to the clock of the read tally circuit (fl) is sequentially read out, converted into analog by the DA converter Qυ, and then sent to the LPF on the output side. (The data input/output timing control, so-called R/W control, for RAM Q4, which is output from the output terminal a through IG, is performed by the R/W switching circuit (c) which receives the write and read tarlocks as input,
Address switching is performed by a multiplexer controlled by the R/W switching circuit (2). Here, the write clock times 1iFt (+3 is a pulse proportional to the rotational speed of the variable speed motor (for example, in the case of an FG servo motor) ,
A voltage controlled oscillator (VCO
), and the output is a division circuit with a division ratio of N as shown in the figure.
It has a phase-locked loop configuration (PLL) in which the comparison signal of the phase comparator (to) is inputted through . According to this configuration, the rotational speed of the variable speed motor @ is set to V
Then, the oscillation frequency (fl) of vC003) is f1=
kNv (11,:i, + -+21, but it is a constant of k order. Therefore, even if speed unevenness occurs due to wobble of the motor, the sampling clock (fl) will change in proportion to it. Therefore, Even if temporal distortion occurs in the variable speed reproduction signal due to wobble and flutter, the sampling timing is also temporally distorted accordingly, and the relative position to be sampled does not change. By reading out the data stored in the register with an accurate constant frequency lock (fl), it is possible to obtain reproduced audio in which the influence of this influence is completely removed, even if a two-clock flank occurs in the variable speed moke.

In addition, in the above explanation, RAMQ4) which is a memory circuit
Pulse code 8 modulation (Pu1s
e Code Modulation) L', but the present invention is not limited to this; for example, it is possible to operate in the same manner by quantizing the input signal using delta modulation. For example, rotational irregularities in a variable speed motor can be tolerated, so not only can the motor's 7-wheel drive be made smaller, but also the constant speed control of the speed control circuit can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block circuit diagram showing the principle for explaining the time axis conversion of a signal, Fig. 2 is a drawing showing the Wack-Frank characteristic, and Fig. 6 is a block circuit diagram showing the speech fluency signal reproducing device of the present invention. αυ...input terminal, (LIQE9・
...LPF, alias...clock. 04)...RAM (storage means), αη...output terminal, Ql...A/D9 conversion circuit, αI (2G...address circuit, C11)...D/A conversion circuit, (Ha )...
R/W switching circuit, (c)...Multiplexer, (2
)...Variable speed motor, Iso...Phase comparison circuit, ■...
・LPF, (2?)... Frequency dividing circuit Applicant: Sanyo Denki Co., Ltd.

Claims (1)

[Scope of Claims] (1) When an input signal is sampled according to a first clock and sequentially stored in a storage means, and when the stored signals are sequentially read from the storage means according to a second clock, the -th and '
IIl! An audio signal reproducing device comprising an isowave number conversion circuit that converts the frequency of an input signal by changing a ratio of isowave numbers of two clocks, wherein the first clock Fi is a speed signal pulse proportional to the playback speed of the playback device. An acoustic signal reproducing device characterized in that the output is an output of a voltage controlled oscillator forming a PLL having a phase comparison input. (2) Claims characterized in that the playback speed of the playback motor of the audio signal playback device is adjustable, and the frequency of the first tarok is controlled in relation to the ratio of the playback speed to the recording speed. The acoustic signal reproducing device according to (1).