JPS5850383B2 - information processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing device, and particularly to prefix conversion.

Recently, virtual computers have been considered for the purpose of increasing the debugging efficiency of operating systems.

This is a software technique that makes a single computer appear as if there are multiple computers with the same functionality.

Computer virtualization is achieved by allocating real computers to operating systems on a time-sharing basis using a control program called a virtual computer monitor that manages real computers.

One of the problems with the virtual computer system described above is as follows.

In recent information processing devices, a specific area called a 4KB or 8KB prefix area is reserved in the main memory, and this area is used as an area for storing device status information when an interrupt occurs or an area for storing new device status information after an interrupt. It is used for.

In the prefix area, a real address on the main storage device is indicated by a prefix register in the information processing device.

In the information processing device, if the real address to refer to or update the main memory is within the prefix area (addresses 0 to 4095 or addresses O to 8191), prefix conversion (real address + contents of prefix register) is performed using the prefix register. The main memory is referenced and updated at the later address.

A conventional information processing device has only one prefix register.

Therefore, in a virtual computer system, a temporary prefix area that is not directly referenced or updated by the information processing device is defined for each virtual computer using the virtual computer monitor described above.
When an interrupt occurs, the various information stored in the real prefix area managed by the virtual machine monitor is moved to the corresponding temporary prefix area, the post-interrupt state is set, and control is passed to the virtual machine's interrupt processing program. Processing is in progress.

Therefore, the overhead of the virtual machine monitor for simulating interrupt functions and the like is large, resulting in a decrease in the performance of the virtual machine.

An object of the present invention is to eliminate the problems of the prior art as described above, and to have at least two or more prefix registers in an information processing device, and to arbitrarily control the plurality of prefix registers in the information processing device according to instructions from a program. An object of the present invention is to provide an information processing device that has the effect of reducing the overhead of simulating interrupt processing using the virtual machine monitor.

Next, embodiments of the present invention will be described in detail using the drawings.

The figure shows a prefix converter that is a feature of the information processing apparatus according to the present invention.

In the figure, 1 and 2 are prefix registers.

3 is an indicator indicating which of prefix registers 1 and 2 is valid.

The outputs of the prefix registers 1 and 2 and the indicator 3 are input to a prefix register selection circuit 5.

The prefix register selection circuit selects prefix register 1 or 2 according to indicator 3.

The output of the prefix register selection circuit 5 is input to a prefix conversion circuit 6.

The prefix conversion circuit 6 also inputs real address information, and if the real address is within the range of the prefix area, the address information obtained by adding the prefix register selected by the prefix register selection circuit and the real address is output to the output line. Output to 4.

If it is outside the prefix area, the real address is output to the mother output line 4.

The output line 4 is led to the main memory and is used as an address for accessing the main memory.

Note that the configurations of the prefix register selection circuit and the prefix conversion circuit are obvious from the prior art and will not be described in detail.

Next, a method of using the present invention will be described.

Prefix register 1 is assigned to the virtual machine monitor (real computer), and prefix register 2 is assigned to the program on the virtual machine (virtual machine).

Further, prefix register 1 is a standard prefix register, and the initial value of the indicator is set to select prefix register 1.

When the virtual machine monitor runs for the first time, prefix register 1 is selected and processing is performed using the standard prefix area.

When creating a virtual machine using the virtual machine monitor and passing control to it, perform the following processing.

First, a prefix area for the virtual machine is secured, and its start address is set in the prefix register 2.

Thereafter, an instruction to change the indicator is executed, prefix register 2 is selected, and control is passed to a program running on the virtual machine.

While the program on the virtual machine is running, the prefix area 2 is enabled, and the prefix area can be referenced and updated without the intervention of the virtual machine monitor.

When control is passed from the program on the virtual machine to the virtual machine monitor, the command to change the indicator is executed again and prefix register 1 is selected.

By controlling as described above, it is possible to allocate unique prefix areas to the real computer and the virtual computer.

Therefore, there is no need to perform processing such as simulating a prefix area using a virtual machine monitor.

Although one embodiment of the present invention has been described above, the number of prefix registers included in the information processing device is not limited to two, and prefix register switching is performed depending on whether the virtual machine monitor or the program running on the virtual machine is used. However, the present invention is not limited to this, and for example, the switching may be performed only when a prefix area is referenced or updated under specific conditions in a program running on a virtual machine.

As described above, in the information processing device according to the present invention, when realizing a virtual machine system, it is possible to reduce the pseudo processing of the prefix area by the virtual machine monitor, and the performance degradation of the virtual machine due to the overhead of the virtual machine monitor can be reduced. can be prevented.

Furthermore, the program runs in real address mode (
Conventionally, even when running in a mode in which address translation is not performed, an address translation table was prepared just to simulate a prefix area for a virtual machine, and the machine was run in virtual address mode.

In the information processing apparatus according to the present invention, this is not necessary, and the overhead caused by simulating the prefix area as well as the hardware and software overhead caused by the above-mentioned wasteful address conversion can be reduced.

BRIEF DESCRIPTION OF THE DRAWINGS The figure shows an embodiment of the present invention. 1.2...Prefix register, 3...
...Indicator, 5...Prefix register selection circuit, 6...Prefix conversion circuit.

Claims (1)

[Claims] 1. An information processing device having a prefix area for storing specific information to be referenced and updated by the information processing device in a main storage device, which has at least two or more prefix registers indicating the start address of the prefix area; An information processing device comprising: an indicator that can be set by a program to indicate which prefix register is valid among the prefix registers, and means for switching the prefix register using the indicator.