JPS5848298A - Information processor - Google Patents

Abstract

PURPOSE:To improve the secrecy of the memory contents, by comparing the contents corresponding to the supplied address with the contents of a cipher code and reading the memory only when the coincidence is obtained from the comparison. CONSTITUTION:The contents of an address fed from outside are set to a register 2 via an address buffer 4. In this case a cipher code is read out of a cipher code cell 8, and the contents of the register 2 are compared with the contents of the cipher code. When the coincidence is obtained from the above-mentioned comparison, a memory cell 7 is read. While an address clamping circuit 5 is set if no coincidence is obtained from the comparison. Thus the address signal fed from the buffer 4 is changed for its address code and then delivered. Therefore the cell 7 receives an access by an address having no relation with the normal address. Thus it is impossible to decode the contents of a memory, and the secrecy is improved for the memory contents.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing apparatus, and more particularly to an information processing apparatus having a function of protecting the confidentiality of semiconductor memory contents.

Conventional memory, such as programmable ROM (FRO)
Any information can be programmed into M) using an external writing means, that is, a FROM writer. However, on the other hand, there is a drawback in that the contents of the program written in the AK from the outside can be known by satisfying the same input conditions (same address specification) as in the case of round-off writing, which is writing from the outside. Moreover, especially ROM
It is often used to store superimposed software data such as company micrograms or system control information, and its contents are extremely confidential.

Therefore, the conventional structure that allows IKJ copying has a major disadvantage in protecting the uniqueness of the system, and the development of processing devices with a function to protect program secrecy is currently ongoing. However, many drawbacks have not yet been resolved, such as the financial burden of papermaking, the complicated hardware and frequent failures, and the lack of versatility as the secret mechanism is uniquely fixed. do not have.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide an information processing device that is highly confidential and has a general-purpose configuration.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of the essential circuitry of a memory (FROM in this example) to which a secret protection circuit is added.

When the power to PRON is turned on, a power set-up detection circuit 1 provided inside the chip is activated, and a power set-up detection circuit 1 is outputted to the register 2. This signal initializes register 2 (sets it to an input enabled state), and the contents input from the outside are set into register 2 via address buffer 4. At this time, the previously programmed cryptographic code is read out from the cryptographic code cell 8 by means of a specific address area designated by the control signal 11 from the power set-up detection circuit 1. A comparator circuit 3 compares the contents of the register 2 and the contents of this encryption code.

If the contents of the two match, the address scrambler circuit 5 reset signal is output from the comparator circuit 3, and the address scrambler circuit 5 is reset by this signal and the 9 address scrambler circuit receives the address data that will be output from the address buffer 4 thereafter. The data is transferred to the address data 6 as is.

On the other hand, if the contents of the two do not match, the address scrambler set signal is sent from the comparison circuit 3 to t1, and the address scrambler circuit 5 is set. When the address scrambler circuit 5 is set, the address signal input from the address buffer 4 is changed to a code different from that address code and output, so the address signal is different from the regular address. 9. to are a read/write decoder and an output buffer on the data bus side, respectively.

As is clear from this operation, only when the contents of register 2 and the contents of the encryption code match, a normal readout of each message is performed; otherwise, meaningless data is output. and K. Therefore, only those who know the encryption code can access the memory without fail, and even if someone who does not know the code performs one operation, normal program processing will not be possible.

In other words, the contents of memory cannot be deciphered.

The confidentiality of memory contents is ensured. That is, the order of the programs set in memory is unknown.

The above functions will be explained using FROM as a specific example.
The present invention is applicable to all other semiconductor memories. If the encryption codes do not match, the detection signal may be used to prohibit address input, but this is not enough to prevent access to the legitimate encryption code by arbitrarily changing the input address. , the address code can be changed (this can be done either by using an address and changing it, or if the address is prohibited but irregular memory is generated from another random number counter, etc.) program protection is more effective.

Furthermore, for the encryption code cell portion 8, it is more appropriate to use a mask ROM for the RAλ and ROM because it is more versatile and allows the encryption suite to be arbitrarily set. However, there are other types of EFROM, such as fusion type or junction breakdown type bipolar FROM, that use a cell structure that is more efficient than K.
can be realized. Further, although the operation of the comparator circuit is set at the time of power-on, it may be set to operate only at a desired time by, for example, an external key operation. In addition, address input may be performed by key operation, or as part of program processing within the system. Furthermore, such a structure can be configured independently and as a memory chip, or can be included in a single chip CPU.
It is clear that equivalent restrictions apply to the manufacture of such products.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a main part of a memory according to an embodiment of the present invention, which includes a security protection circuit.

Claims (1)

[Claims] A means having an encrypted code and a means for inputting a code to the above-mentioned encrypted code are compared, and if they match, a matching signal is generated, and thereby the message information corresponding to the input address is read out. An information processing device comprising: means.