JPS5847357A - Automatic phase controlling system - Google Patents

Abstract

PURPOSE:To prevent effectively the delay of the control signal due to a filter process and an overlap process and the characteristic deterioration caused by the noise and to realize a high-speed communication, by giving an arithmetic process to the sampled value for each modulating element of two wave detection signals according to a prescribed system. CONSTITUTION:A prescribed operation is carried out for wave detection signals x and y through transversal filters alpha and delta of a block U1 of a demodulating circuit. These signals x and y are then applied to a block U3. The control signal of phase shift receives an operation through arithmetic elements 1-12, an automatic phase control circuit APC and 1/(a<2>+b<2>) of the block U3. Then the modulated vector is decided from a function table VN. At the same time, the transmission data per modulating element is restored by a 1-channel storing circuit T2 and an adder 13 and fed to an interface circuit INT. Furthermore an estimated error is calculated by an error estimated value calculating circuit S of the automatic equalizing wave detection signal of a block U2 and then applied to a circuit ATC which extracts the timing information from the blocks U1 and U2 plus the wave detection signal. Thus a high-speed communication is made possible.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic phase control system.1 Particularly, in filter processing to obtain a demodulated signal, noise contained in a control signal is removed by a low-pass filter and a control loop is entered. This paper concerns an automatic phase control system that compensates for delays through predictive processing.

A platform that transmits data using a voice telephone line, usually using a modem.

When receiving and receiving voice calls, signal phase fluctuations and frequency deviations occur on the line, including the dormitory section, and conventionally automatic phase control is performed using a modulator/demodulator to correct for these disturbances.

In conventional automatic phase control loops, each output signal is input to the control loop and then fed back after filtering is performed for each signal to obtain a demodulated signal. In order to increase the processing speed by overlapping, it is necessary to use a delayed control signal in terms of feedback to the control loop. Furthermore, since this control signal includes one high frequency noise, it is necessary to insert a low pass filter into the control loop to remove this noise.

However, 1. Delays in control signals due to such causes deteriorate the operating characteristics of automatic phase control. , or communicate without increasing the speed.The purpose of the present invention is to eliminate the noise that appears in the control signal using a low-pass filter, in order to solve the problems of the conventional method. An object of the present invention is to provide an automatic phase control system that improves control characteristics by eliminating and compensating for delays entering a control loop through predictive processing.

The automatic phase control method of the present invention calculates the difference between the products of the Nampudunda value for each modulation element of two detection signals and the modulation code restored from the other detection signal, and calculates the difference between the products of the modulation code restored from the other detection signal. The value divided by the multiplication sum is used as the control signal 0, the control signal is subjected to eye processing, -1 is the predicted value of the filtered output signal at the point of control, and - is the signal obtained by processing the predicted value. It is characterized by using

The principle of the present invention will be explained below using an operational formula. The automatic phase control method of the present invention will have a remarkable effect when applied to a modulator/demodulator based on a signal value data system, for example.
Please refer to Figures 8 to 16 of the "Modulation and Demodulation System" for which a patent application was filed on the same date as the present invention, and their explanations.
It is necessary to distinguish between 0 and 0, and to represent the received wave, the reference angular frequency -0 on the cleavage side must be used.

In general, the modulation carrier on the receiving side affected by the transmission path,
It is expressed as follows.

R(t)−γ1(t)cos(ω0t+α0(t))−
γ2(t) sin(ω0t+α0(t)) ...(1
) Note that α0(t) is the error i due to the transmission path.This is -. With the specials distributed in the vicinity of the center,
In order to handle this as a transmission characteristic seen from the baseband, it is necessary to replace it with a complex number representation.

e(t)=R(t)ejω0t...(2) Above (2
), e(t) is equivalent to the following equation.

e(t)=e0(t)+jes(t) ec(t)=cosω0t・R(t) ...(3)e
s(t)=sinω0t・R(t) Next, in order to be able to handle it from the baseband side, it is necessary to limit the spatial value to (-2fW) to (2KW). For this purpose, it is necessary to consider complex filtering ξ(1).

In other words, create the following equation.

z(t)=e(t)*ζ(t), ζ(t)=η(t)+
jζ(t)ζHere, the jar models an operation that takes commegliesi on both sides.

z(t)=x(t)+jy(t) x(t)=η(t)*ec(t)+ζ(t)*es(t
)y(t)=η(t)*es(t)−ζ(t)*ec(
t)...(4) Perform filtering for automatic equalization on Jin's signal,
Assuming that s'(t) is obtained as the output, it is expressed as. Here, if z'(t)-x'(t)+jy'(t), the following equation is derived.

Here, as shown in equation 0 above, the wave created by the received wave. α for t. (t), so Z(t)
It is necessary to correct the scissors difference due to g and (t).However, since g(t) cannot be directly estimated, first create the following signal.

Z(t)=z'(t)ejθ(t) (6) Next, it is necessary to consider control to bring θ(t) in the above equation (6) closer to α0(t). Here, OZ(t
)-X(t)+jY(t) X(t)=cosθ(t)x'(t)-sinθ(t)
y′(t)
...(7) Y(t)=c
osθ(t)y'(t)-sinθ(t)x'(t) Then -δ(t)=α0(t)-θ(t)...(8), then J(t) is the phase shift of the detected carrier wave) Let us consider a feed pack loop that detects this and controls #(t). To do this, in order to find the quantity proportional to %J(t), it is necessary to analyze the above equations ① to (c) that take over a part of the demodulation function. First, the complex number representation in ① above ⑐ is The following formula is obtained.

R(t)=(γ1(t)+jγ(th))e−j(ω0
t+α0(t)) ...(9) Next, z(t) is ξ
If the influence of (1) is omitted, the following equation is obtained.

z(t)=R(t)ejω0t=(γ1(t)+jγ2
(t)) e−jα0(t) Therefore, the above (
6) The formula is as follows.

Here, by substituting the above equation (0), Δα0(t-iT2)=α0(t)-α0(t-iT2
) and the detected signal is expressed as follows.

In the above equation 00), the terms after Σ, which is the output form of the silane sparse filter on the right side, are the results of reducing and automatically controlling the signal of the ω equation.

Now, if this is set as F(kI), the following equation is derived. By solving the above αυ equation for sin δ(kT3), the following equation is obtained.

sin δ(kT)=X(kT2)B(kT2)−Y(k
T2) A(kT2)/A(kT2)2+B(kT2)2
...(12) The right side of the α2 equation above is the detected signal X(kT, ), Y(kT
This is a signal that can be created by using the barley tone code &**b* restored from , ). When transmitting all responses using the double-sided band method, 5lnJ(kT3)=x(
kT3), it becomes as follows.

x0(kT2)=X(kT2)bk-Y(kT2)ak
/ak2+bk2 (13) The signal of the above formula 05 can be used as a phase shift control signal.

The feature of the present invention is to embody the above-mentioned formula 0.

Next, the phase angle 11 (kT,) of the detected wave is expressed as follows. (kT
, ) will be explained below.

First, the phase shift is determined by the following equation from equation (8).

δ (kT2) = α (kT2) - θ (kT2) ... (
14) and C are ff, (k T, ) is the input signal of the control system, and #(kTS) is the response of x0(kT2). Also, x0Ckl) is the input signal of the M control loop,
θ(kT,) is the signal at the end point of the control loop, that is, the control point. The input signal of the control loop is distorted by at least one modulation digit due to the processing when viewed from the processing digit at the control point. Furthermore, if n-fold overlap processing has been performed before creating this signal, I? If there is a delay in pump sang, the input signal at that time will have the following value.

The signal of x0((k-N)T2), (N=n+1) is,
The signal passes through a lag filter to ensure tracking of the deflection, and then returns to a prediction filter. As a response due to such transmission, 0(kT, ) is obtained.If this is expressed in the time domain, it becomes a linear equation.

θ(kT2)-G, (kT,)*G, (kT,)*z*
((k-N)TS)...(15) Here, G, (hr), G, (kr,) are the unit responses of the lag filter and prediction filter, respectively, and 1*
means performing a convolution integral on both sides.

If we take two transformations on both sides of the above C0 equation, we get the following.

θ(Z)=G0(Z)・GN(Z)・Z−N・x0(Z
)...(16) The number δ(
To find Z), take two transformations of the above α formula and use the above 00
Just substitute the formula. That is, δ(Z)=Z−NG0
(Z)・GN(Z)・x0o(Z)=α0(Z), but since sin δ(kT2)−x, (kT, ),
Since it is possible to set δ(Z)=x0(Z), the following equation can be obtained.

δ(Z)/α0(Z)≡W(Z)=1/1+G(Z)G
(Z)=Z-N・G0(Z)・GN(Z)
(17) In order to obtain the algorithm of the automatic phase control loop by Sakai analysis, first, the prediction stage is described as follows.

In the above equation 00, consider the preliminary 11% del in the case of N-1. Assuming that the previous predicted value is x (kT,), first give the following equation as an approximate value.

■(kT2)-2x(kT2)-x((k-1)T2)
In the same way, the predicted product difference can also be predicted, so the following formula is given as the corrected value of x(kT,).■(kT2)=■(k
T2) - ■(kT2)ee, where ■(kT, ) is the prediction error s
! (k%) no 1'' prediction value ahead of the remensi, and is given by the following equation.

■(kT2)=2e(kT2)-e((k-1)T2)
Also, e(kT2)=x((k-1)T2)-x(kT
2). Therefore, e(by,) and x(kT2)
), the following equation is obtained.

■(kT2)=2(2x(kT2)-x((k-1)T
2))-(2■((k-1)T2)-■((k-2)
T2))...(18) By skipping this operation by the number of predicted elements, a predicted value having steps equal to the number of skips can be obtained.

GN(z)a, predictor transfer I when the number of skips is 1
! It is obtained from I(G, (Z)) using the following formula.

GN (Z) = G1 (ZK) ... (19) And G
1(Z) ti% is obtained by converting the above predicted operation formula with the number of skips of 1 by 2, and is as follows.

G1(Z)=4Z2-2Z/Z2+2Z-1...(
20) Using this formula, G (Z) in the formula for α above becomes as follows.

G(Z)=2(ZN-2)/Z2N+2ZN-1・G0
(Z)=G0(Z)+”N2-4N+1/8(Z-1)
2・G0(Z)...(21) Therefore, in the frequency range where z-1, G(
Z)=G, (Z)CP! It can be seen that it is determined by the lag filter. G, (Z) has the characteristics of lag filter and vCO.

Figure 1 is a four-page diagram of an optimization algorithm for 11 circuits showing an embodiment of the present invention. Figure 2 is an excerpt of the boot block configuration diagram of Figure 1, and Figure 3 is an excerpt. 1st! l! l
! It is a plotter diagram of the Mu POii path in FIG.

Determining the detected signal using the sample value operation formula is the basis of constructing the demodulation function. By substituting 〒 for t in the detection operation general formula shown in equation (7) above, the following can be obtained. The detection operation sample value operation formula for -δ1y((k-i)T2))) is obtained.
The operation is performed within the parentheses, including #, J, X, and 7 on the right side of the expression! )#, J part is a transparsal filter. &*@bk of splitter U is a function table for determining the modulation vector, which is constructed by ROMIII, and g of this table is
The t number is the ROM address signal Toro 2 shown above (formula 22).
x(k'l',), Y(k!,)t al.

In addition, the arithmetic elements 1 to 8 are the output x(k?*
) and the predicted value x(kT
*), and its internal circuit is shown in Figure 3.
The input signals are generated by the arithmetic elements 9 to 1 shown in FIG.
2, and the part consisting of l/(a''+b''), and the part consisting of the phase shift control signal
(k'l'',) is calculated.

Furthermore, MaN is a function table that converts the input signal, a petal whose component is &*e%*, into a numerical value.
It consists of ROM etc. 〒, is a 1-carap storage circuit, and the adder 13 takes the fraction of the VN output value by 1 modulation element, and restores the transmission data information of (a, I modulation element), and these The signal is output to an interface circuit IN〒 to regenerate the transmitted binary data code. Further, TC of block U is a circuit for obtaining timing follow-up information from the detected signal, and 8M is a circuit for obtaining errors in the detected signal used for automatic equalization and their predicted values.

In FIG. 2, the eight people, W, 1R, WA, #i are the read address and write address instruction registers of the plotter U, #tr, respectively. 1 to 1 in FIG. 1 correspond to FIG. 2. In this way, each splitter records data that is used in the process of transferring to the next element! By r*succeeding ζ7>, overlap processing is performed. In ζ,
To create a feedback loop, the L register output is
Since a delay equivalent to three modulation elements is given to the processing of block U0, it is necessary to compensate for this on the child side. For this reason, it is possible to give priority to m-4 in FIG. 3, and to dye it with the program of the printer U.

Also, since the feedback loop created by the five PO circuits in Figure 1 is performed within one book U, there is no delay Fi due to overlap processing, but the
In the processing of the points fed back from the O circuit, #
Register T in Figure 3Cb>.

Since the APO processing result of the previous element is used, the control delay is one step.

Therefore, it is necessary to set h-1 in Figure 3).As explained above, according to the present invention, the delay of the control signal due to filter processing and overlap processing to obtain the demodulated signal, and the control signal Since it is possible to effectively prevent characteristic deterioration due to included noise, etc., high-speed transmission is possible.

[Brief explanation of the drawing]

[Figure 1 is a splitter diagram of a demodulation circuit showing an embodiment of the present invention,
2F is a block diagram of the second circuit shown in FIG. 1, and FIG. 3 is a block diagram of the automatic phase control (APO) N path in 1W. TJ+TJIeTJIp07ri, vN: Function table, IN〒
:Interface circuit, RA1. , Wml,,l'' read address, write address instruction register, APO! automatic phase control circuit, VOO: voltage controlled oscillator, whip C: automatic timing control circuit, SX: error of automatic equalization detection signal 1,000 m Value calculation circuit, &*ebk” number 1, T, :1 character storage circuit.

Claims (1)

[Claims] The difference between the products of the sampling values for each modulation element of the two detected signals and the modulation codes recovered from the other detection signal, divided by the sum of squares of the modulation codes recovered from both detection signals - is the value obtained by The automatic phase is characterized in that the control signal is subjected to filter processing, and a predicted value of the output signal of the filter processing or a signal obtained by processing the predicted value is used at the point of action of the first control. control method.