JPS5846900B2 - Call control notification system for public telephones - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a call control notification method for predicting forced disconnection of a call or notifying a reminder to insert coins during a long-distance call in a charge-type public telephone.

Conventionally, when coins that have been inserted and are waiting to be inserted in response to a billing signal from an exchange are stored, if the next billing signal indicates that the coins that should be stored have not been inserted, a tone reminding the user to insert coins is sent to the telephone receiver of the communication circuit. Public telephones are used to remind people to send money and insert coins.

However, even after the billing signal arrives, calls are guaranteed for a predetermined unit call time, and if no additional coins are inserted during this time, the call will be forced as the unit call time elapses. Since the call is disconnected, the call may be suddenly disconnected without prior notice during the remaining call, which may cause discomfort to the user.

Note that the unit call time differs depending on whether it is a local call or a long distance call, and the unit call time for a local call is longer than that for a long distance call. Because the call time is shorter, the unit call time differs depending on the person you are calling, and it is difficult to predict how long you can talk after hearing the reminder tone, especially for local calls. was the longest, and had the notable drawback of giving the impression that the call had been cut off suddenly.

In addition, depending on the type of exchange, in the case of local calls, there is a single billing method where the call is forcibly disconnected when the unit call time elapses, and there is a system where coins are collected every time the unit call time elapses and continuous calls are allowed. There are multiple billing methods, and in the case of long distance calls, there is generally a multi-charging method, but there are two types of public telephones: one for local calls and one for long distance calls. Since various functions are required, it is impossible for one public telephone to be compatible with each system, and separate public telephones must be prepared according to the type of exchange and service type. Another major drawback was the lack of compatibility as a public phone.

The present invention aims to eliminate all of the drawbacks of the conventional system at once, and includes an audible signal generator that starts up a predetermined time before the unit call time elapses and sends an audible signal to the call circuit. An audible signal from the same audible signal generator is used as a warning tone for forced call disconnection in a single billing method or a coin insertion reminder tone in a multi-charging method, depending on the status of the switch operated according to the service type for the telephone. This provides an extremely convenient call control notification system for public telephones.

Hereinafter, the present invention will be explained in detail with reference to figures showing examples.

FIG. 1 is a connection diagram showing the main circuit of a public telephone, with line terminals L1. A filter unit 1-FLU for detecting billing signals and diodes D101 to D are connected between L2 and the call line device.
A bridge circuit consisting of 104, a power supply circuit PS, and a disconnection circuit CB are inserted, and a terminal Fl of the filter unit (FLU) is inserted.

Question 14 and between F3 and F5 each allow direct current to pass through, so when hook switch H83 is turned on due to hook-off, line terminal L17L
Regardless of the polarity of 2, if the hook switch H8S side is the positive pole and the disconnection circuit CB is on, the loop current flows to the telephone line device, and this loop current circulates through the diode D11 and the Zener diode ZDI. , a Zener voltage is generated in the Zener diode ZDI, which causes the capacitor C1 to pass through the diodes D2 to D4.
0 to C12 are charged, and this terminal voltage is used as a power source for various parts including the power source VDD of the semiconductor circuit.

In addition, in the disconnection circuit CB, when the hook switch H83 is turned on, a positive voltage is applied via the telephone line device to the resistors R38 and R4.
1 as a forward bias to the transistor Q11, turning on the transistor Q11. Therefore, the transistor Q10゜Q9 is also turned on by the forward bias from the resistor R42, and the connection point [F] between the resistors R3B and R41 turns on. It remains on unless it goes to 1L" (low level).

In addition, the capacitor C5 of the initial reset circuit 1R is a Zener diode ZI)1 due to the circulation of the loop current.
According to the generation of the Zener voltage, it is charged via the diode D10 and the resistor R26, but the resistor R26
Since the terminal voltage of capacitor C5 gradually rises according to the time constant determined by the values of capacitor C5 and capacitor C5, the output of inverter 21N2 is also 1L while the terminal voltage is less than the input threshold level of inverter 21N. , changes to 'H' (high level) when the terminal voltage exceeds the input voltage threshold level.

Therefore, V''L'' from the start of loop current flow due to hook-off until the output of the inverter 21N2 becomes 1H'' is used as the initial reset signal.

In addition, when the hook switch H82 is turned off due to hook-on, the charge of the capacitor C5 is transferred to the resistor R2.
4 is applied to the input of the inverter 12N, and the output thereof is turned to L", so that it is discharged through the output impedance of the inverter 12N and the resistor R25.

In addition, the return magnet RM of the coin storage part CM is a self-holding type having an operation winding P and a recovery winding S,
This operation drives a coin return lever (not shown) of the coin storage section CM.

Furthermore, depending on the operation of the coin storage magnet KM, a coin storage lever (not shown in the figure) of the coin storage section CM is driven,
It is used to store coins.

Figure 2 shows a block diagram of the control system, in which the timer circuit TM is equipped with an audible signal generation circuit that generates an 800 Hz audible signal, and a connector CN as a switch.
3. CN5 is provided, and connector CN3. C.N.
The switching is done in response to the operation by replacing the 800
An Hz audible signal is used as either a forced cut warning tone or a coin insertion reminder tone.

The clock counter 1N is a binary counter with a built-in oscillator for generating clock pulses, and is activated upon hook-off by a circuit not shown in the figure, for example, 12.
After counting the 8KHz clock pulses, the output Q4 is set to ``H'' every 0.625 m5ec after startup, and the output Q14 is set to ``H'' every 0.625 msec after startup.

The coin accumulation detection circuit CD detects waiting coins accumulated on the above-mentioned coin storage lever, and for example,
An excitation coil and a detection coil are used, which are arranged opposite to each other across the coin storage area.The excitation coil is excited by the oscillator output, and the magnetic flux generated thereby is detected by the detection coil, and the material of the coin is detected. By changing the magnetic flux detection status depending on the presence or absence of a coin, the presence of a coin is detected and at the same time it is also determined whether the coin is made of an authorized material or not.

The dial control circuit DC is given a dial pulse which detects the intermittent loop current as the terminal voltage of the resistor R43 in FIG. 1, and this is counted by a decimal counter to detect the dial number. A binary counter counts the number of digits in the dialed number, and based on these counting results, the first digit of the dialed number is 10.
If it is 10, output '0N'.
When Block is 'V''L'' and 11'' to 19'', it is 1.
H", and a control output is generated according to the dial number.

In this case, since a button type dial is used as the dial, the dial control circuit DC receives an audible signal of 600 Hz for confirmation as well as a control signal for the dial pulse according to the operation of the button. It includes a dialer circuit that generates a 600 Hz audible signal in accordance with the operation of the button.

As will be described later, the timer circuit TM is mainly composed of a clock counter and a counter that are activated upon hook-off, and counts the elapsed time after hook-off, and controls a built-in audible signal generation circuit that generates an audible signal of 800 Hz. The audible signal generating circuit is activated a predetermined time before the unit call time elapses, and an audible signal of 800H is generated.
It is designed to transmit z.

Note that in FIG. 2 and subsequent figures, numbers are assigned to the inputs and outputs of each gate, so when explaining the signal path, these numbers will be displayed together with changes in signal level.

In FIG. 2, first, connector CN3.
This is to replace CN5, and in the case of single billing method, short-circuit connector CN3 between 1 and 2,
In the case of the multi-charging method, connectors 2 and 3 of the connector CN3 are short-circuited.

Further, if only for local calls, connectors 1 and 2 of connector CN5 are short-circuited, and when long-distance calls, that is, transmission of the first digit "0", are permitted, connectors 2 and 3 of connector C5 are short-circuited.

Therefore, in the case of local call only and single billing method, connector CN3. After short-circuiting between CN5 and CN5, the following operation is performed.

In other words, if the first digit Atayal number is 'X□'',
Output 10 “Block” of dial control circuit DC is V”L
", therefore, this signal is applied to the circuit (2) in FIG. 1 via the connector CN5 1-2, and the disconnection circuit CB is turned off, thereby forcibly disconnecting the transmission.

On the other hand, if the first digit dial number is 11"~'9", the output '0'Block becomes 'H', and the inverter 22N12'H"-22N11"L" → composite gate 7N6'L" , turns off the AND gate of the composite gate, and blocks the signal from the clock counter 1N.

Also, at this time, the NOR gate 24N8 is connected to the connector CN.
3, the power supply VDD is applied and becomes 'H', so its output is held at 1L', and the coin accumulation detection circuit CD
The detection power is also blocked, and at the same time, the AND gate 23N1 is also turned off.

However, the composite Geyuto 7N9 is 1H due to the connector CN3.
”, and the AND gate of the same gate N is in the ON state, so if the timer circuit TM activated by the start of a call sends out an audible signal of 800 Hz, this will be the gate of the composite gate 7N8. -7N4→NAND gate 2ON
The call is sent to the handset R of the same device via the route 8-2ON10→inverter 12N6-12N9→transformer T→capacitor C9, and this audible signal of 800 Hz is heard by the user.

However, the audible signal generation circuit in the timer circuit TM is activated a predetermined time before the unit call time elapses after the timer circuit TM starts operating due to hook-off, and the unit call time is 3. If it is .5 minutes, 0.5 minutes is set as the predetermined time, so it will take 3.0 minutes from the start of the call.
After a few minutes, an audible signal of 800 Hz begins to be transmitted, and this becomes a warning sound for forced disconnection due to the elapse of a unit call time.

Note that the audible signal of 800 Hz is transmitted using a timer circuit TM.
Under internal control, this operation continued for about 837 m5ec and then was stopped.

Therefore, since the forecast tone is heard 0.5 minutes before the call is forcibly disconnected, the user can know that the call is about to be disconnected.

Next, in the case of local calls only and multi-charging method,
As described above, connector CN is left short-circuited between 1 and 2, and connector CN2 is switched to short-circuited between 2 and 3.

Then, the disconnection circuit CB is turned off by the first digit O'' transmission, and the transmission is disconnected in the same manner as described above, but this time, an audible signal of 800 Hz is used as a coin insertion reminder sound.

That is, if the first digit is 11" to 19", the output 10"B 1ock of the dial control circuit DC becomes "H", which is the output of the inverter 22N12'H"-22N11'L.
〃→NOR gate 24N1'L'' is applied, while the NOR gate 24N8 is also grounded by connector CN3 and becomes ``L'', so if the coin accumulation detection circuit CD detects that there are no coins, the Detection power is 1
By becoming L'', the NOR gate 24N9 becomes 1H.
", and this turns the AND gate 23N1 on.

Therefore, since the audible signal generation circuit of the timer circuit TM is activated 3.0 minutes after the start of the call as described above, and the control output TMC of the timer circuit TM is 'XH'', the AND
Gate 23N2 is turned on and the audible signal 800 Hz is AND gate 23N21323N211 → AND gate 23N12-23N, 3 → composite gate 7N4 → NAND
Gate 2ON8-2ON10 → Inverter 12N6-1
The signal is sent to the receiver R via the route 2N9→Henkaiki T→Capacitor C9, and this becomes the coin insertion reminder sound.

However, the control output TMC of the timer circuit TM is approximately 468
After m5ec, it becomes 1L, so this 468 m5ec
An audible signal of 800 Hz is transmitted only during this period.

However, even if the audible signal of 800 Hz is transmitted 3.0 minutes after the start of the call, if a coin is inserted, the detection power of the coin accumulation detection circuit CD is 1H, so N
OR gate 24N9 is 1L", which causes AN
D game 1-23N1 is off, and the receiver H
An audible signal of 800 Hz is not transmitted.

Note that the timer circuit TM is reset every time a unit call time elapses and resumes operation, so the above-described operations are repeated while the call is in progress.

In addition, if long distance calls are allowed and multi-charging method is used,
As described above, connector CN3 is left short-circuited between 2 and 3, but connector CN5 is switched to short-circuited between 2 and 3.

Then, by dialing the first digit 10, the dial control circuit D is activated.
Even if the output 'O/'B lock of C becomes 'L', it is not sent to the disconnection circuit CB in Fig. 1, and the 0 point is 1H because the power supply VDD is applied through the connector CN5. The disconnection circuit CB remains on and N, the loop circuit is not disconnected, and ``0'' transmission is permitted.

On the other hand, the output 'O/'Block 1L'' is the inverter 22N12ゝL"-22N11'H"→NAND game)
24NIX'H" and the NAND gate 24N9", the AND gate 23N is turned off, and at the same time, the output "0"Block's XL"
is applied to the input Block of the timer circuit TM, the operation of the circuit TM is stopped, and the audible signal of 800 Hz is no longer transmitted.

Regarding the above, when a billing signal is sent from the exchange in response to the called party's response after dialing, the filter unit F
The receiving circuit in the LU detects this and sets the terminal F8 to 1L during the billing signal period, so this is given to the clock counter 1N via a circuit not shown in the diagram, and the clock counter 1N starts operating. do.

Then, after the start of operation, the clock counter 1N outputs Q4 at 0.625 mse and output Q8 at 10 mse.
Every m5eC, the output Q9 is 20 m5e (: Every m5e, the output Q12 is 160 m5e4, the output Q13 is 320 ms
In order to set the output Q14 to 1H" in 640 mse in the evening, the coin storage magnet l-KM in Fig. 1 is operated by the output Q8 via the circuit omitted in the figure, and
.

This state is maintained until Q13 becomes 1H", and (3
Coins are stored by operating the coin storage magnet l-KM for 20+20)-10=330 msec.

After that, if the outputs Q14 and Q4 become 1H" at the same time,
That is, 640 seconds after the clock counter 1N starts operating.
At m5ec, the AND gate 18N11.12 becomes 'H' and the gate 18N turns on, so if there is no coin to be stored next, the coin accumulation detection circuit CD
Since the detection force of the inverter becomes 1L, the inverter becomes 3N.
3″N″L″-3N4’H″→AND gate 18N13
'H"-18N10'H" → Composite gate 7N5'H", and composite gate 7N6 also outputs '0"Block
'H'→Inverter 22N12ゝL"-22N11'
H" becomes "H", and the route of the AND gate 18N to the composite gate 7N4 is configured.

Then, the output Q14 of the clock counter 1N becomes the outputs Q12 and Q13 by a separate reset circuit.

It remains "H" until the clock counter 1N is reset after 1 120 m5ec when Q14 becomes 1H" at the same time.
In order to maintain the
During the period c, the output Q4 of the clock counter 1N becomes 0.
The 800Hz signal generated by repeating 1H" and "L" every 625 mSe is connected to the aforementioned route and NAND gates 2ON8-2ON10→inverter 12.
It is sent to the telephone receiver R via N6-12N9 -> transformer T -> capacitor C9, and this becomes the coin insertion reminder sound.

FIG. 3 is a block diagram of the timer circuit TM, in which the initial reset signal associated with hook-off is the AND gate 6N.
.
, 3N3, 3N4, the clock counter 11N, and the counter 12N are reset.

Next, when the first digit is dialed, the dial control circuit DC detects this and sets the start manual ST to "L".
In order to do this, FF3N is set and its output Q is set to H.
“.

Then FF 3 N, Q 'H" → AND gate 6
N2131H"-6N211'H"→NAND gate 5
N292H"-5N210'L" releases the reset state of the clock counter 11N and counter 12N, so that each counter 11N and 12N enters the operating state.

Note that the clock counter 11N is connected to the resistor R11°R1.
2. It has a built-in oscillator whose frequency is determined by the variable resistor VR11 and the capacitor C11. In this example, the oscillation output with a frequency of 546.14 Hz is used as a clock pulse for counting operation, and 29 msec after the start of operation.
Output Q5 to cm, output Q6 to 58m5e4, 468
Output Q9 to mse sea, output QI to 937 m5e4
O is set to 1H", and after the same 15 seconds, the output Q1
4 is closed to 1H", this is held at 30Se@, and then changed to 1L", and the above operation is repeated.

Further, the counter 12N counts a signal obtained by inverting the output Q14 of the clock counter 11N by the inverter 17N4 as a clock pulse, and counts 30 SeC after the clock counter 11N starts operating? The output Q1 is 1
．． The output Q5 is turned off at 5 minutes, and the output Q6 is turned off at 1H at 3.0 minutes.

Therefore, in this example, since the unit call time is 3.5 minutes, if strap terminal t is connected to t2, 1H" will be connected to strap terminal t 3.0 minutes after each counter 11N, 12N starts operating. is given, t(SH" → FF by inverter 17□1N1ゝH"-17, N21L"
3N2 and 3N3 are set, each output Q changes to 1H", and FF3N3Q'H" turns on the NAND gate 5N4 of the audible signal generation circuit ASG, and the inverter 1
A positive feedback circuit is formed through 7N2, and resistor R16,
R17, variable resistor VR12, and capacitor C13 start generating an audible signal of 800 Hz, and send this as a disconnection forecast sound.

In addition, when used as a coin insertion reminder sound in a multi-charging system, the control output TCM is also used at the same time as described above, and NANIy7 part 5N34 is initially set to 1H, but after activation of the audible signal generation circuit ASG. Approximately 468
The signal becomes "L" at m5ec, thereby cutting off the coin insertion reminder sound.

That is, the output Q6 of the counter 12N becomes 1H",
When FF3N2, 3N3 are set, each counter 11N, 12N is reset by NAND gate 4N, 1.8.2'H"-4N19'L"→NAND gate 5N28"L"-5N210ゝH〃. counter 12
N's output Q6 immediately becomes 1L", but NAND gate 4N1PL"-4N19'H"→NAND gate 5N2
8ゝH"-5N210ゝL", each counter IIN
, 12N start operating again after being momentarily reset, and when the output Q9 of the clock counter 11N becomes H" after about 468 m5ec, the NAND gate 5N36'H"
-5N34'N"L", the immediate output TMC is set to 'L'.
“Turn to.

Note that the output Q9 of the clock counter 11N is approximately 468
The output QIO of the counter 11N becomes 1H, and the NAND gate 5N12'H"-5N13'L" → A.
F by ND gate 5N36'L"-5N34'L"
F3N3 is reset, its output Q changes to 1L'', turns off the NAND generator 5N4 of the audible signal generating circuit ASG, and stops generating the audible signal of 800 Hz.

In addition, the timer circuit TM is also used to generate a charging signal in a multi-charging system for local calls, or to generate a forced disconnection signal when a unit call time has elapsed in a single charging system for local calls. The signal output S is 1L"
It is sent by

That is, at 30 SeC after the restart of the above-mentioned operation, that is, 3.5 minutes after the start of the first operation, the output Q of the counter 12N
1 becomes 'H' and this is given to the NAND gate 4N34, and at this time, the output Q5 of the clock counter 11N is 1L, so this is applied to the inverter 17N311.
'L"-17N310'H"→NAND gate 4N35
'H' is given, and FF3N2Q'H' is also given as N
By applying "H" to AND gate 4N83, it becomes NAND gate 4N361L" and 1L" is sent to signal output S.

Sorry, this is the clock counter 1 after about 30m5ec.
When the output Q5 of 1N becomes 1H", the NAND gate 4N36' becomes H", so it is sent out as a 1L" pulse.

In addition, FF 3N4 is set by the 1L pulse of the control output S, and its output Q is 'H', and if the output Q5 of the clock counter 11N becomes %H//, the NAN
D game) 4N213, 12.11v"H"4N210'
L"→AND gate 6N, 2'L"6N43'L"→A
FF 3 N2.3 N4, each counter 11N, by ND gate 6N212"L"-6N211'L"
12N is reset, and at the same time, FF3N2 is also reset by "L" of FF3N2Q.

Then, the output Q5 of the clock counter 11N becomes "L", so the NAND gate 4N211'L"4N210
"'H" → AND gate 6N42'H"-6N43"H
"→AND gate 6N212"'H"-6N211'H
"→NAND gate 5N29'H"-5N210v"L
``, each counter 11N, 12N starts operating again, and the above operations are repeated until the end of the call.

In addition, as for the operation of the timer circuit TM, it is necessary to regulate the start of operation of each counter 11N and 12N according to the charging signal from the exchange, and the filter unit FLU in FIG.
When a charging pulse of 5L" is sent from the AND gate 5N41'L"-6N431L"→AND gate 6N212'L"-6N211L", each counter IIN, 12N and each FF3N2.3N3, 3N4
After resetting, when the charging pulse changes from "L" to 1H", the AND gate 6N211'H" is set, so that each counter 11N, 12N is in an operating state.

In addition, when the first digit is "+", it is a state in which long-distance calls are allowed or a state in which outgoing calls are to be prevented in the case of local calls only, and the operation of the timer circuit TM is not necessary, so the dialing is performed as described above. Output 'O''Bloc from control circuit DC
k is given as 1L" during hook-off, and FF3N or reset state is maintained by AND gate 6N18'L"6N110'L", and timer circuit TM does not operate. In addition, a switch or changeover without using a connector as a changeover device The same thing can be done even if a terminal or the like is used, and the frequency and transmission time of the audible signal may be determined according to the conditions, and the configuration of each part can be arbitrarily selected, and various modifications are possible.

As is clear from the above explanation, according to the present invention, a single audible signal generating circuit is used as a forced disconnection warning sound and a coin insertion reminder sound after being arbitrarily switched, and selection is possible according to the type of exchange and service type. This improves the compatibility of public telephones, as well as transmitting a warning sound immediately before a forced disconnection, which is convenient for users, eliminates the discomfort caused by sudden disconnections, and prevents various types of disconnections. It has a great effect on public telephones.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention; FIG. 1 is a connection diagram showing the main circuit of a public telephone, FIG. 2 is a block diagram of the control system, and FIG. 3 is a block diagram of the timer circuit. Place...Telephone circuit, R...Telephone receiver, CN3. CN5・
...Connector (switcher), TM...Timer circuit, 1N
... Clock counter, CD ... Coin accumulation detection circuit, T ... Transformer, C9 ... Capacitor.

Claims (1)

[Claims] 1.Equipped with an audible signal generation circuit that starts up a predetermined time before the specified unit call time elapses and sends an audible signal to the call circuit, and transmits the audible signal according to the elapse of the unit call time according to the operation of a switching device. A call control notification system for a public telephone, characterized in that it is used as either a forcible call disconnection warning sound or a coin insertion reminder sound.