JPS5843769B2 - Data processing system with multi-channel to channel adapter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data processing system having a multi-channel-to-channel adapter, and more particularly, to a data processing system having a multi-channel to channel adapter, and more particularly, to a data processing system having a multi-channel to channel adapter. ) in a data processing system configured to manage tests of
The present invention relates to a data processing system capable of transferring designated test programs and the like at high speed in response to test program loading requests from each UTC.

Although the present invention is not limited thereto,
When testing C, providing a peripheral device for loading a test program individually for each UTC requires an enormous hardware configuration.

For this reason, for example, a modularized test program is prepared in one host data processing device, and the host data processing device responds to test program loading requests from multiple UTCs according to the test status. A system that distributes at high speed is desired.

2. Description of the Related Art Conventionally, as a communication means for communicating between one data processing device and a plurality of sub-data processing devices, for example, one using a communication means is known.

However, in the case of a system in which each UTC executes test processing randomly, such as the above-mentioned test system, using the above-mentioned known communication means would seriously damage the configuration and take time to process the communication. Undesirable.

The present invention aims to solve the above points,
Creates a 1-to-n multi-channel to channel adapter that connects a host data processing device and multiple sub-channels.
The purpose is to communicate with a data processing device.

Therefore, a data processing system having a multi-channel to channel adapter of the present invention connects a host data processing device and a plurality of sub data processing devices through inter-channel connections, and connects the host data processing device to a plurality of sub data processing devices. In a data processing system that performs data communication between the host data processing device and one of the sub data processing devices, the channel of the host data processing device and the plurality of sub data processing devices
A multi-channel to n-channel adapter is provided between each corresponding channel of the data processing device, and the multi-channel to channel adapter connects the plurality of sub data processing devices to each corresponding channel of the data processing device. a priority selection circuit unit that selects read commands and/or write commands from one sub-data processing device selected by the priority selection circuit; An interface control circuit unit that receives write commands and/or read commands from a data processing device and intermediately controls data transfer, and machine number information of the sub data processing device that corresponds to the selected write command. means for setting the data into an interface control word to be sent to the host data processing device, and controlling the selection of the sub data processing device based on machine number information in the interface control word received from the host data processing device. the plurality of sub-data processing devices configured to be capable of transmitting and receiving data including the interface control word between each of the plurality of sub-data processing devices and the host data processing device; a data transmitting/receiving circuit unit configured to transmit and receive data between a selected one of the sub data processing device and the host data processing device, and each of the sub data processing device and the host data processing device By setting the above interface control word, at least the machine number of the sub-data processing device that communicates with the above-mentioned host data processing device is specified, and the above-mentioned host data processing device and the selected one sub-data processing device are connected. It is characterized in that data is transferred to and from the device via the data transmitting/receiving circuit section.

However, when using iPL, the machine number is automatically specified.

This will be explained below with reference to the drawings.

Figure 1 shows the configuration of an embodiment of the system of the present invention, Figure 2 A and B
3 shows an embodiment of the format of communication data used in the present invention, and FIG. 3 shows an embodiment of the configuration of a multi-channel to channel adapter used in the present invention.

In FIG. 1, 1 is a host data processing device, 2 is a channel of the host data processing device, 3 is a large storage connected to the host data processing device and stores, for example, a test program. 4-B to 4-n are UTC channels, respectively.
(abbreviated as A).

As stated at the beginning of this specification, each UTC 4-0, 41, . . .
Each issues a request to the host data processing device 1 to load the test program it requires.

In response, the host data processing device searches for the requested test program and transfers it to the UTC.

Therefore, in the case of the present invention, as shown in the figure, multiple UTC4
-0, 4-1, . . . and the host data processing device 1 are connected by a 1-to-n connection MUL-CCA 6, so that high-speed channel-to-channel communication is possible. Ru.

The MUL-CCA6 includes each UTC4-0, 41,...
A priority selection circuit is provided for selecting read and/or write commands from .

Communication is then performed between the selected UTC, for example 4-0, and the host data processing device 1 according to an interface substantially the same as that of a conventional channel-to-channel adapter.

However, communication is performed by including an interface control word indicating the selected UTC in the communication data.

FIG. 2A shows an example format of communication data,
Reference numeral 7 in the figure is an interface control word (ICE) in which, for example, the UTC machine number and type of UTC are set, and 8 is transfer data in which the communication content and communication data are set. represents a variable-length variable.

However, when transferring data at the time of initial program loading, in order to match the format specified by iPL, as shown in Figure 2B, MUL-CCA6 to U
When transferring to the TC, the transfer data is sent out first.

FIG. 3 shows the configuration of an embodiment of a multi-channel to channel adapter (MUL-CCA) used in the present invention.

Reference symbols L4-0 to 4-n and 6 in the figure correspond to those in FIG.

Further, 9 is a write command receiving section, 10 is a write command priority selection circuit, and 11 is a UT CIJ-de.
Command receiving section, 12 is a read command priority selection circuit, 13 is a UTCIJ-code data transmitting section, 14 is a read data set gate, 15 is a UTC write data receiving section, 16 is a write data・Set gate, 17 is UTC interface control transmitter/receiver, 1
8 represents an interface control set gate.

Furthermore, 19 is an interface control circuit section, and 20 is a CP-to-CP section.
UIJ-de command receiving section, 21 is a CPU write/receiving section;
22 is a CPU interface control transmitting/receiving section; 23 is a CPU write data receiving section; and 24 is a CPU IJ-code data transmitting section.

Further, 25 is a data register, 26 is a UTC interface control word register, 27 is a decoder, 28 is a selection gate, 29 is a data register, 30 is a CPU interface control word register, 31 is an encoder, 32
represents a selection gate, and 33 and 34 represent OR circuits, respectively.

The processing in MUL-CCA6 can be broadly divided into (1) processing in which UTC requests test program initial loading from the host data processing device (hereinafter referred to as iP);
(referred to as L request processing), (11) UTC, which has received the iPL loader through the above IPL request processing, issues control information to the host data processing device to execute the program (
(hereinafter referred to as UTC data request processing), (11D) processing in which the host data processing device that receives the above UTC data request processing transmits the corresponding program (data) described above (hereinafter referred to as CPU data transmission processing) ), and each of the above processes will be explained in order below.

Q] iPL request processing The iPL request processing is performed as follows.

That is, (1) UTC requesting iPL, e.g. 4-0, is MU
A read command is sent to L-CCA5.

(2) MUL-CCA 6 determines the priority among read commands from other UTCs in priority selection circuit 12, and assume that, for example, a read command from UTC 4-0 is selected.

(3) The read command is supplied to the interface control circuit section 19, and the control circuit section 19 issues a read attention interrupt to the host data processing device 1 via the transmitter/receiver section 22.

On the other hand, the above read command is supplied to the gate 14 via the OR circuit 34, and the gate 14 then receives the data sent from the host data processing device 1 side (which is write data WD from the CPUI side and corresponds to UTC). Then, preparations are made to transfer the read data RD) to UTC4-0.

(4) The host data processing device 1 that received the above-mentioned interrupt issues a read command to the MUL-CCA 6 in order to know the contents of the separate interrupt.

The read command is received by the receiving section 20.

(5) The MUL-CCA 6 sets the interface control word in the interface control word register 30 by the interface control circuit section 19 via the "set at 1'-1PL" signal shown in the figure.

That is, a flag requesting iPL, a UTC4-0 machine number,
The type of UTC 4-0 is set as an interface control word, and the contents of the register 30 are transmitted to the host data processing device 1 via the transmitter 24.

That is, in response to the above-mentioned read command issued by the host data processing device 1, the interface control word instructing the iPL request is transferred to the host data processing device 1.

(6) The host data processing device 1 decodes the interface control word and prepares predetermined data, that is, data to be sent to UTC 4-0.

(7) When the host data processing device 1 completes the data preparation mentioned in the above process (6), it issues a write command to the MUL-CCA 6.

The command is supplied to the interface circuit section 19 via the illustrated receiving section 21 .

(8) When the MUL-CCA 6 receives the above write command from the host data processing device 1,
In synchronization with the control of the read command previously sent from UTC 4-0, the data (write data WD) transmitted from the host data processing device 1 is sent to the register 25, gate 28, and gate 14. It is transferred to UTC4-0 via

(9) The data transfer ends when the write command from the host data processing device 1 is turned off.

As a result, MUL-CCA6 becomes free.

[]f) UTC data request processing When the UTC 4-0 receives the iPL loader through the above iPL request processing, it performs the necessary tests and tests based on the loader.
Control information is sent so that the program is supplied from the host data processing device 1.

This process is performed as follows. (10) UTC4-
0 issues a write command to MUL-CCA6.

(11) The MUL-CCA 6 is selected by the priority selection circuit 10 and interrupts the host data processing device 1 based on a write command from the UTC 4-0, for example.

Interface control word register 3 by encoder 31
A control word such as the UTC4-0 machine number is set to 0.

(121 The host data processing device 1 that received the interrupt issues a read command to the MUL CCA 6 in order to know the contents of the interrupt.

a3) Correctly, MUL-CCA6 is register 30
The contents of are transferred to the host data processing device 1.

At this time, the gate 16 selects UTC4-0, and following this transfer, the write data from UTC4-0 is transferred to the host data processing device 1 via the register 29.
Transfer to.

α→ The data transfer is terminated by turning off the write command from UTC 4-0.

(15) The host data processing device 1 then prepares the requested data.

(1) CPIJ data transmission process When the data is prepared by the above process (15), the host data processing device 1 sends the requested data to UTC4.
-0.

This process is performed as follows.

That is, (16) host data processing device 1 is MUL-C
Sends a write command to CA6.

(17) Upon receiving the write command, the MUL-CCA 6 sets the interface control word in the write data from the host data processing device 1 in the register 26.

The UTC4-0 machine number is written in the contents of the register 26, which is decoded by the decoder 27, and the output of the OR circuit 34 is sent to the gates 14 and 18 to be output as UTC4-0.
control to select.

(From 1110CfLIC, MUL-CCA6 interrupts UTC4-0 via transmitter/receiver 17.

α3 UTC4-0 responds to the interrupt by sending MUL-
Sends a read command to CCA5.

(20) Upon receiving the read command, the MUL-CCA 6 transmits the write data WD sent from the host data processing device 1 via the register 25 to UTC4.
Transfer to -0.

(21) The data transfer ends when the write command from the host data processing device is turned off.

As explained above, according to the present invention, a multi-channel two-channel adapter with one-to-n connection is developed, and information transfer between a host data processing device and a plurality of sub data processing devices is performed. This can be done through inter-channel connections, which simplifies the control means compared to systems using conventional communication means, and enables high-speed information transfer.

In the above information transfer, an interface control word is used, so there is no possibility of making a mistake as to which sub-data processing device the information is transferred to.

In addition, all testing methods can be automatically managed at once by the operator simply by starting iPL, making it extremely efficient.

[Brief explanation of the drawing]

Figure 1 shows the configuration of an embodiment of the system of the present invention, Figure 2 A and B
3 shows an embodiment of the communication data format used in the present invention, and FIG. 3 shows an embodiment of the configuration of a multi-channel to channel adapter used in the present invention. device, 2 is channel, 4
-B to 4-n are sub data processing devices, 5-B to 5-n are channels, 6 is a multi-channel to channel adapter, 10.12 is a priority selection circuit, and 19 is an interface. control circuit, 13,1
4,15,16゜25.26,27,2B,29,30
, 31. 32 represents a data transmitting/receiving circuit section.

Claims (1)

[Claims] 1. A host data processing device and a plurality of sub data processing devices are connected by an inter-channel connection, and the host data processing device and a plurality of sub data processing devices are
In a data processing system that performs data communication between a data processing device and any one sub-data processing device, a channel of the host data processing device and each corresponding channel of the plurality of sub-data processing devices A multi-channel to n-channel adapter with l-to-n connection is provided between the multi-channel to n-channel adapters.
The adapter includes a priority selection circuit unit that selects read commands and/or write commands from the plurality of sub data processing devices, and a read command from one sub data processing device selected by the priority selection circuit.・
an inkface control circuit unit that receives commands and/or write commands and write commands and/or read commands from the host data processing device to intermediately control data transfer;
Means for setting machine number information of the sub-data processing device corresponding to the command into an interface control word to be sent to the host data processing device, and machine number information in the interface control word received from the host data processing device. and means for executing selection control of the sub-data processing devices based on the information, thereby transmitting data including the interface control word between each of the plurality of sub-data processing devices and the host data processing device. a data transmitting/receiving circuit unit configured to transmit and receive data between a selected one of the plurality of sub data processing devices and the host data processing device;・Data processing device and the above host・
For each data processing device, by setting the inkface control word, at least the model number of the sub data processing device that communicates with the host data processing device is designated, and the host data processing device and the selected sub data processing device are specified. Ta1
1. A data processing system having a multi-channel to channel adapter, characterized in that data is transferred between two sub-data processing devices via the data transmitting/receiving circuit unit. 2 A host data processing device and multiple sub data processing devices are connected through channel-to-channel connections, and the above-mentioned host data processing device
In a data processing system that performs data communication between a data processing device and any one sub-data processing device, a channel of the host data processing device and each corresponding channel of the plurality of sub-data processing devices A multi-channel-to-channel adapter with 1-to-n connection is provided between the
The adapter includes a priority selection circuit section that selects read commands and/or write commands from the plurality of sub-data processing devices, and a priority selection circuit section that selects read commands and/or write commands from the plurality of sub-data processing devices; command and/or write command and the above host
An interface control circuit unit that receives write commands and/or read commands from a data processing device and intermediately controls data transfer, and machine number information of the sub data processing device that corresponds to the selected write command. means for setting in an interface control word to be sent to the host data processing device, and selection control of the sub data processing device based on machine number information in the inkface control word received from the host data processing device. Each of the above multiple sub-
The data processing device is configured to be capable of transmitting and receiving data including the interface control word between the data processing device and the host data processing device, and the data processing device is configured to be able to transmit and receive data including the interface control word between the data processing device and the host data processing device, and a selected one of the plurality of sub data processing devices and the host data processing device. The sub-data processing device and the host data processing device each include a data transmission/reception circuit configured to transmit and receive data between the sub-data processing device and the host data processing device by setting the interface control word. At least the machine number of the sub-data processing device that communicates with the processing device is specified, and data is transmitted between the host data processing device and the selected one sub-data processing device via the data transmission/reception circuit section. The multi-channel to channel adapter is configured to perform a transfer, and the multi-channel to channel adapter is further configured to transfer data to the interface in response to a read command requesting an initial program loading from one of the sub-data processing devices. The machine number of the sub-data processing device is set in a control word, and the host data processing device is configured to interrupt the above-mentioned host data processing device, and the host data processing device interrupts the multi-channel processing in response to the separate setting. - A data processing system having a multi-channel to-channel adapter, wherein the data processing system is configured to issue a read command to the two-channel adapter to read the interface control word.