JPS5829075A - Character recognition device - Google Patents

Abstract

PURPOSE:To simplify the constitution of a character recognizing device for the spread to home use, by recognizing a graph or a character, through the drawing of the graph or the character on a displayed screen with a display device such as a home-use TV and a light pen. CONSTITUTION:A light on a screen of a TV14 is detected with a light pen 15 and coordinates of a scanning position of this pen 15 is generated from a coordinate generating circuit 4. The content of a signal of an operation control section 1 inputting a coordinate signal coded from this circuit 4 is checked for the control of the entire device. A synchronizing signal is transmitted from a synchronizing signal generating circuit 2 to each circuit, a scanning trace on the screen of the pen 15 is stored in a chroma information memory 17 and character information is stored in a character memory 8. Based on the content stored in character memories 17 and 8 and the information, they are stored as picture information of the TV14 to a video memory 3. Based on the picture information from the memory 3, the recognition of characters is made at the operation control section 1 and a character recognizing section 6 and the TV14 for home use can be used as the character recognizing device.

Description

DETAILED DESCRIPTION OF THE INVENTION This invention provides a character g that is drawn on a display device using a light ben and is capable of recognizing patterns such as a circle character pattern.
- Regarding wave equipment.

Recently, the technology for recognizing single characters has improved tremendously, and a wide range of characters can be read.1. Character recognition devices are becoming more and more popular in all types of packaging. Such character gilli devices have improved reading performance and processing speed. Mamaru character Ia! wIA5 includes paper C1, or for the purpose of reading printed characters (2. Mechanical structure, solid sensor for optical lens change, lens system, etc. are essential,
The device itself is large-scale (2).However, the bowl-shaped ``Mataji'' introduction device has the drawback that it cannot be widely used for everyday household stories.

This invention was made in view of the above sentiment,
To provide an x-shaped device which uses a display device for a home television and a light screen, draws a figure or a character on the display screen from the second side, and performs recognition of the figure or character. With the goal.

@1 Figure is one of the TV T-characters used--set l111i of an embodiment of this invention? ll is shown. Reference numeral 1 indicates an art book control section, which is the central part of this character recognition set. This arithmetic control section 1 is configured to issue an instruction to receive an output signal from an input main memory 5 and a recognition operation to the character printing section 5 via a connection line 1m. ing. The character signal coded from the connection line 61 is sent to the arithmetic control unit 1 as a recognized result (=).The arithmetic control unit 1 also connects the connection line The figure memory 1 is configured to send an instruction signal to input the coordinate-transformed output from the light pen 15 or a clear signal to the figure memory 7. Furthermore, a connection line Jc derived from the arithmetic control unit 1 is connected to the character memory 1, and via this connection line 1c
Character codes including blanks that you want to display are transferred to i-Ko. In addition, a connection line 1d derived from the arithmetic control unit 1 is connected to the video memory 3, and the contents of the graphic memory 1 and characters are updated via this connection line 14 to update the contents of the screen currently being displayed. Memo IJ
A control signal for transferring the contents of 74 to the video memory S and a signal for scanning in the 1 m direction are sent.

Further, the arithmetic control unit 1 outputs a color indicating what color to display the contents of the graphic memory 1 and the character memory 8 on the screen via the connection line 1e derived from the arithmetic control unit 1. 6 to transfer information to color information memory 1.1. Further, an audio signal generated from a speaker in the television is sent to the audio FM circuit 12 via a connection line 1f derived from the arithmetic control unit 1.

Connection line 4 between coordinate generation time *4 and input cover turn memory 5
A is the line from which the light pen 15 sends a signal encoded with the long-time signal S, and the arithmetic control lsJ reads the signal content of this line 4. It is now possible to see which part of the light pen 15 is in contact with the light pen 15. moreover,
Connection line 111 derived from arithmetic control 1111 section 1
A cassette operation signal is sent to the external connection or the built-in cassette tape recorder 1# through the cassette. The recorded audio or character data to be displayed on the screen is sent to the arithmetic control section 1 via a connection line 191 derived from the cassette tape recorder 11.

In the case of a loud voice, the signal from the cassette tape recorder 19 is transmitted through the arithmetic control unit 1 and the connection line 1t to the voice F.
The signal is sent to the M circuit 12. In addition, the control results introduced in this character set are outputted via the connection line 1h derived from the arithmetic control unit 1 and the turnout interface circuit 20. In addition, this turnout interface 2o and connection line 2
It is designed to receive and receive commands from outside through the Otori. A color signal generation circuit 11 and a video signal generation circuit 10 are connected to the arithmetic and control unit 1 through a connection line 1M.
It is set +'- so that a color that can be detected by the light pen 15 is always displayed on the TV J4 (+'-) so that a controlling brightness signal is output.

The symbol 2 is the synchronization signal generation circuit.

N T 80 (Nati
onalTelevision 8system Oom
It has the function of generating all the necessary synchronization signals using the MLTT method and sending the synchronization signals to each circuit. A connection line 21 derived from the synchronizing signal generating circuit 2 is connected to the video memory 3, and horizontal and vertical ink phase signals and horizontal ink signals are sent through the line 2a. ing. r*j

A connection line 2c derived from the synchronization signal generation circuit 2 is connected to the video signal generation circuit 10'! & confused this line 2c1
Vertical and horizontal synchronization pulses and equalization pulses are sent via e. A connection 2in 2d derived from the synchronization signal generation circuit 2 is connected to the coordinate generation circuit 4 of the light pen 15.

Vertical* and horizontal synchronization pulses and the horizontal nest lock gogo are transmitted through this line 2d.
The connection line 2@ derived from the synchronization signal generation circuit 2 is 1
It is connected to the graphic memory 1 and configured to transfer vertical and horizontal synchronization pulses and horizontal image collection signals.

A connection line Jf derived from the synchronization signal generation circuit 2 is connected to the character generator 9, the character memory 1, and the color information memory 11, and is connected to C2 so that vertical and horizontal synchronization pulses are transferred via this connection line xtvt. ing.

The video memory 1 has a storage capacity equivalent to two pixels on the screen of the television 14, and has horizontal and vertical synchronization pulses and one horizontal pixel.
The m1E clock signal is sent from the synchronization signal generation circuit 1 via the connection line 2, and horizontal and vertical memory address counters (not shown) count addresses and access the corresponding address of the video memory 3. 9. From the arithmetic control m1 to the video memory 3 via the connection line 1- to rewrite the rounded video memory data that maintains the screen display, the rewritten data is Connection line 21 connected to circuit 21
Transferred from Hatake.

OR data of the contents of the graphic memory 1 and the contents of the character memory 1 is sent to the video memory 3 &=. The output line 3 of the video memory 3 is connected to the video signal generation circuit 1o and the color signal generation circuit 18, and the signal outputted via this line 31 is output from the video signal generation circuit 1o (2). It is outputted as screen data, and outputted as a luminance signal to the color signal generation circuit 11G2.

The coordinate generation circuit 4 is configured so that the light pen 15 corresponds to the iji of the television 14.
The ninth circuit identifies which part of the surface is in contact, and the connection line 2 is derived from the synchronization signal generation circuit 2.
d, vertical and horizontal first-period pulses and horizontal pixel clock signals are sent, and these pulses and clocks are connected to the electron beam of the tube 12 or the Ii! of the television 14. ! ith
] is scanned using an address counter (not shown).

The light pen 15
When a signal indicating that light has been detected is received, the contents of the address counter at that time are sent to the input cover turn memory 51, the figure memory 7, and the @arithmetic control unit 1 via the connection line 4. .

The input cover turn memory 5 stores the screen 1IIi of the television 14.
It also has a memory capacity equivalent to the number of characters and vertical and horizontal address counters, and when a command signal for character recognition 1 is sent from the arithmetic control unit 1 via the connection line 1a,
The coordinate signal output from the coordinate generation circuit 4 is connected to the connection line 4.
af: Uke increases through. Then, input cover turn memory 5
The coordinates in .zeta.2 are compared with 9 addresses or specified by the address counter, and the signal level of 2 signals representing the input cover turn is written into the bit of that address. This writing operation continues until a light pen writing end signal is sent from the arithmetic control s1 (indicated by 2).

The character recognition unit 16 starts character recognition operation upon receiving the 1-input end signal from the arithmetic control unit 1. This letter l&I! The #1 section d scans the input pattern memory 5, performs feature extraction or GM using the matching method, and sends the result to the arithmetic control section 1 via the output line 6m. There is.

The graphic memo IJ 7 has a memory capacity equivalent to that of the screen. The address count is performed using the horizontal and vertical synchronizing pulses sent from the horizontal and vertical synchronizing pulses and the horizontal clock, and the address count is performed using the horizontal and vertical synchronizing pulses sent from the horizontal and vertical synchronizing pulses, and the address count is performed using the horizontal and vertical synchronizing pulses sent from the horizontal and vertical synchronizing pulses.
62 so as to also receive the coordinate signal of the generating circuit 4. 1*% When this figure memory r receives the light pen writing command IB via the connection line 1b, the figure memory r receives the command IB for writing with the light pen via the connection line 1b.
The coordinates where the Nilight pen 15 detected the light are sent to the coordinate generation circuit 4.
The receiver is received via the connection line 4at, and the coordinates of the address counter of this memory 7 are set. is performed only once in one image direction, so the empty time up to that point ≦ 2 The address counter of the graphic memory r is operated by the synchronization pulse of the synchronization signal generation circuit 2 or the clock 42, and the address counter of the video memory 5
The contents are written in the character memory 1 and the figure memory 7, and figures input with the light pen 14 are also immediately displayed on the 62-screen. Note that the output data of the graphic memory 7 is input to one side of the OR circuit 21 via the connection line 11.

The character memory 8 has a memory capacity equal to the number of characters that can be displayed on the screen CFF (6), and has a memory capacity of 9 (bytes) in character units. The address column 1 of this character memory 1 is arranged in a ζ diagonal so that it is operated by signals from the arithmetic control section 1 and the synchronization signal generation circuit 1.

This character memory 1 is designed to contain characters for displaying results output from the calculation side f418151 and messages for the user. J
In the four units of about 62, character after data and address data are sent from the arithmetic control unit 1 via the connection line IC, and the content of the character data is written into the character memory 8 at the address. The synchronization pulse and clock output from the synchronization signal generation circuit 2 are used when displaying the contents of the character memory 8 to ll1Itl (
=, When the arithmetic control unit 1 sends a transfer command signal to the character memory 8, the output of the character memory 8, which is set to C2, is sent to the connection line 8 so that it is supplied to the address counter of the character memory 8.
ζ to be input to the character generator 9 via a
It's two.

The character generator 9 is a read-only memory that executes a code T dot followed by a turn C to display the contents of the character memory 8, and sends the dot pattern to the video memory.

Horizontal and duty synchronizing pulses and horizontal self-locking pulses output from the synchronizing signal generating circuit 2 are sent to the character generator 9 and the character memory 8 via the connection line 2f. The character generator 9 above is 7x10
To display one character in the matrix (21 lines of data in character memory 1 is accessed 10 times,
After 10 scans, the data in the character memory 8 of the next line is accessed. Furthermore, one character is held for seven clocks with respect to the horizontal pixel clock. And this character Senele! The output of 9 is input to the OR circuit 21 via an output line 9m.

The OR circuit 21 performs the logical sum of the contents of the graphic memory 1 and the dot-converted contents of the character memory 1.

It has a function of sending this signal to the video memory 3. The output of the OR circuit 21 is input to the video memory 3 via the connection line 21, and the contents of the graphic memory 7 and character memory 8 are changed to the ii! I
It is now displayed under i-songs.

The video immersion generation circuit 10 has a function of generating and outputting the video 16 necessary for displaying the flesh side C2 on the television 14 by combining the contents of the video memory and the synchronization signal output from the synchronization signal generation circuit 2. have.

The color signal generation circuit 11 generates the color of the NT80 system from the burst signal sent via the connection line 2b and the # degree signal and color difference signal sent via the connection line 181 derived from the color signal generation circuit 18. It has the function of signal modulation.

The audio FM circuit 11 has a function of subjecting the audio signal sent via the connection line 1f to frequency expansion V- at 4.5 MHz.

The wireless [8 modulation circuit 13 is a high frequency variable circuit for transmitting a TV video signal from the antenna terminal of the television 14, and is a video signal sent via the access life 10m derived from the video signal generation circuit 10. and the connection line 1 derived from the synchronization signal and the 1 envelope-111 modulation circuit 11
Color m number sent via 1m and audio IpMljl
A television video signal is synthesized from the audio signal sent via the alarm line 12at1'' derived from the line 12, a high-frequency conversion V@ is performed, and the signal is sent via the line IIm to the home, for example. The image is supplied to a color television set 14 for the purpose of use.

Further, reference numeral 15 indicates a light pen that detects or guides light as a touch signal to the screen of the television 14. The connection line 11m led out from the light pen 16 is a light guide wire such as a glass fiber, or the light pen 15 (
It is a conductive wire that transmits a minute amount of 1[tlt] that has been photoelectrically converted.

Also, this line 15 is connected to the amplifier 16, and the signal output from the light pen 16 is transmitted to the amplifier 1.
d increases to logic level,
Further, the output signal of this amplifier 16 is inputted to the aforementioned coordinate generation circuit 4 via a connection line 161 (in two configurations).

The color information menu 11 is arranged in six diagonals so that the color information of the screen display sent from the arithmetic control section 1 is stored. 9. The arithmetic system @ section 1 is connected to the 0 color information memory 17 which is designed to write the display color of the content of 1 figure memo + 77 and the display color of each character 62 of the character memory 8 to the color information memory 1. Four arithmetic signals of 6- and 6- to the character memory 8 output from the 1-stream signal generation circuit 2 are sent through the #E continuous line 2f, and the character memory 8 and color information memory 7 are connected to each other. The contents are read at the same timing,
The character code extracted from the character memory 8 and the color information in the color information memory are matched (=). On the other hand, the color signal generation circuit 18 connects the output line 11m of the color information memory 11 and the video The output line 3m of the memory 3 is connected to it, and has the function of generating a color difference signal and a luminance signal.The color information memory 11 has a character memory 8 (2) where the character to be displayed (= The corresponding color information is stored and the color information of the character is output according to the scan.Frank code of character memory 8 yen, outside of the character display area is a figure. The color information for memory area 1 and area 2 is to be outputted.

Note that the output line 17m12 of the color information memory 17 is configured to output a digital signal. From this digital chromatic axis signal, the color signal generation circuit 1g generates a color difference signal and a luminance signal, and outputs "white" and "white" signals from the video memory 3.
6211#: The signal is to be switched according to the "black" information. Therefore, the output of the color signal generation circuit 18 is generated only when the output of the video memory 3 is white, and color signal modulation is performed.

The cassette tape recorder 19 stores the audio signal generated from the television 14 and the digital signal 1+ displayed on the screen so that the digital signal part given to the arithmetic control section 1 is stored (d), and is pre-recorded in a certain book of rules. Necessary data is stored.The arithmetic control unit 1 uses the digital signal 42 output from the cassette tape recorder 19 to control the display on the screen or the generation of audio. This is the turnout interface 2o, which is set so that a dialogue will take place, and that the arithmetic control unit 1 controls the cassette tape recorder 12 via the signal line 1g in response to the user's response. This is used when the arithmetic control unit 1 of the recognition device and another external control unit interact, and the first user and the external user interact using voice and screen.

FIG. 2 is a fraudulent circuit diagram of the color information memory 11 and character memory 8 shown in FIG.
1 is a color axis information memory section of the color information memory 11. In other words, the character memory 8 is indicated by the reference numeral 801.
This is the character memory section of . Color information memory section 111 (2 is C2 so that address data output from color information memory address counter 114 is supplied via gate circuit 112.
Address data output from character memory address counter 802 is supplied. Reference numeral 113 indicates a blank detecting section, which detects when the data read out from the character memory fH, go1 is blank (2. C2 is set so as to give a gate control signal to the gate circuit 172;
Symbol SOS is a sub-counter, which is supplied with the horizontal synchronization signal H8 and pixel clock signal POK output from the synchronization signal generation circuit 2 shown in FIG. It is designed to output .

9, the memory input data DA is supplied from the arithmetic control unit 1 to the memory units 111 and 1101, and the address counters 774 and 10
3 is supplied with the address gator output signal from the arithmetic control section 1, the output signal of the sub-counter 803, the horizontal synchronization signal H8 output from the synchronization signal generation circuit 2, and the agricultural synchronization signal v8. Further, the color information memory section 111. The color information memory address counter 174 is supplied with a color information memory selection signal O8 from the arithmetic control s1. 8 to 6; character memory section 101 and character memory address counter 80
21= is supplied with the character memory selection signal M8 from the arithmetic control section 1.

The operations of the nine-color information memory 11 and the character memory 8 thus constructed will be explained using the timing chart shown in FIG. First, color information memory section 1
71 and character memory section 1101 (explained in two sections).

The color information memory selection signal 08 is set to a high level, and the memory input data 9 changes with the change C of the address data AD, and the memory D is written. It was. At the same time, when writing data to the 1-character memory section 1101, the 5-character memory selection color code M8 is set to high level, and the data is written.

Only two and one color information memory section 171 and character memory section 80
There are two C reading data from 1.

This will be explained using the timing chart of the third VI81.

first,! ! After the 1alW 1st period signal 8 is output and the 1st-2 horizontal 4th period signal H8 is output, the pixel crotter signal PO
K is output. The sub-counter 103 outputs a pulse every seven clocks in the picture collection clock signal POK. 1 in synchronization with the output of this sub-counter 8oJ.
The contents of the character memory address counter ttox and the color information memory address counter 114 are updated.

Accordingly, data of one character is read out from the one-character memory section 801 and the lust-memory section 111, respectively. That is, a character code is read from the character memory section 8111, and nine color information corresponding to the above-mentioned character code C2 is read from the color information memory section 111. However, the data read from the one-character memory section 801.

If it is blank (second), a gate signal is output from the blank detection section JFJ.Therefore, the output of the gate circuit 112 is forcibly turned off.

However, if the output data of the 5-character memory section 1101 is blank, the color information stored at address 0 is read out from the color information memory section 111 and output.

The fourth figure is a detailed circuit configuration diagram of the first wJs: figure memory 7 and character generator 9.

Furthermore, the reference numeral '101 indicates a graphic memory section of the graphic memory 1. This graphic memory section '101 has a Y address counter 7 (112) and an X address counter F1.
The address is specified by the address data output from 7J. The data input terminal IN of the graphic memory section 101 is supplied with an input data signal ID output from the arithmetic control section 1.

The clock terminal OKJ of the Y address counter ro2 is supplied with the horizontal synchronizing signal Ha via the gate circuit VOS, and in the same way, the C2 signal is supplied when data is read from the graphic memory section 701. Before that, the clock terminal OKJ of the Y address counter 703 is connected to the arithmetic control unit 1.
A blocker signal Y00 for clearing the graphic memory section 1 is supplied from. Furthermore, 4=, this Y address counter 1o1 is.

When the load signal LOD is supplied from the arithmetic control section 1, the Y address data YAD outputted from the counter clock generation circuit 4 (details of which will be described later) is read. Counter rot clear terminal OL R
E is arranged so that the output signal of the OR circuit 104 is supplied. This OR circuit 104 (2 is 1 when clearing the memory contents of the figure memory section 101 - 2 output clear signal OLA, and when reading the figure memory section 101 6; is supplied via the gate circuit 105 Vertical-period signal ■8 is input.

On the other hand, the clock terminal of the X address counter 703 is OK.
J4: is supplied with a -2 signal when reading data from the figure/shape memory section 101 so that the pixel clock signal POK is supplied via the gate circuit 705 (2).

9, the clock terminal 0Kj of the X address counter 101
12 is designed so that the clock signal x00 for clearing the graphic memory section 1 is supplied from the arithmetic control section 1.

Furthermore, when the X address counter 10J is supplied with the load signal LOD from the arithmetic control unit 1, the X address counter 10J is configured to perform an acoustic counter so that the X address data It has become. It was,
The clear terminal OLR of the X address counter 703 is supplied with the output signal of the OR circuit 7104 to the Y address counter 702 and l'lTl11. Note that the gate circuit 705 includes the arithmetic control eAJ section 1.
When the read command signal 1'LOM is supplied.

The gate is opened to output a vertical synchronizing signal VS, a horizontal period signal H8, and a pixel clock signal POK.

The code #01 indicates a ROM (read-only memory) in which characters (character patterns in the generator 9) are stored. Accordingly, it has the function of generating a two-way one-character pattern for addressing the X and Y directions of the sub-counters 902 and 903.
is supplied with the pixel clock signal POK, and the clear terminal 0
LR (2 is supplied with horizontal synchronization signal H8. Also,
For the clock terminal OK of the subcarant 03 in the y direction,
The horizontal-period signal H8 is supplied, and the clear terminal OLH is
A vertical synchronization signal v8 is supplied.

Note that the data output from the one-figure memory section 101 and the ROM 901 is supplied to the video memory 3 via the OR circuit 21, so that the data is outputted from the one-figure memory section 101 and the ROM 901.

The operation of the graphic memory 1 and character generator 9 configured in this way is shown in FIG. 5 (4) (Bl 101■)-
This will be explained using the main chart shown in Figure 2.

First, the behavior of the character generator (there are two, the fifth
This will be explained using the tying chart in Figure IAI. Character pattern power stored in the ROMjlOJ? 11
For example, suppose it is composed of a 5×7 dot pattern.

After a pulse is output in the vertical synchronization signal 862, a plurality of pulses are output in the horizontal synchronization signal H8. Then, in relation to the pulses in the horizontal IWIM signal Hat2 (in relation to one scan), the first line of the dot pattern of each character for one line is synchronized with the art collection clock signal POK,
Output from OM901. That is, during the seven scans in which all the dot patterns of each character for one line are output, the change in the output data ODA of the character memory 1 at I: during each scan in the horizontal synchronizing signal H8 is the same. In this way, the output data of the character memory 1 is displayed on the screen of the television 4.

Next: The operation when clearing the contents of the graphic memory section 101 (there are two operations, which will be explained using the timing chart shown in Figure 181). First, the arithmetic control section 1 sets the clear signal OLA to high level and Clear address counter 1o2 and X address counter 101. Then,
The %Y address counter 1o2 and the X address counter 103 are sequentially counted up by clock signals Yoo and X00 supplied from the arithmetic control section 1. During this time, the input data I signal I is input to the %-figure memory section 101.
DA is set to low level], and the signal at this level is written to the graphic memory section 10, so the signal DA is set to low level.
The memory contents of 1 are cleared.

9. The operation when data is written in accordance with the signals output from the light pen 15 of the graphic memory section 101 will be explained using the timing chart of FIG. 5 (0)≦2. When the light pen 15 detects light from the screen of the television 14.

Vertical-period signal ■8 from the coordinate generation circuit 4, which will be described in detail later.
1: A well-sampled interrupt signal is supplied to the calculation control unit 1. This interrupt signal is transmitted to the arithmetic control unit II-
Supplied. Upon receiving this interrupt signal, the arithmetic control section 1 outputs a load signal LOD. Along with this, the arithmetic control unit 1 sets the input data ID to high level for a predetermined period of time. Since the load signal LOD is at high level 62, the X address counter 702 and the X address count 0j≦2 are respectively loaded with Y address data Y input D% be done. Therefore, when the light pen IJ detects light on the picture th of the television 14, high-level data is stored in the graphic memory section Fl)J corresponding to the 9th position fill2. In this way, the figure memory section 101
In the TV 14 1IIIi city (2, light pen 1
The trajectory drawn in step 5 will be memorized.

Furthermore, 62, the operation when reading data from the graphic memory section 701 will be explained using the timing chart shown in FIG. 5 IDI.1 When reading data from the graphic memory section 701, the calculation control section 1 A pulse appears in the read command signal ROM to open the gate of the gate circuit 705, thus opening the X address counter 102.
is cleared by the vertical sync signal 8, and the horizontal sync signal) 18
will be counted up. Also, the X address counter 7
03 is cleared by the vertical synchronization signal vS and counted up by the pixel clock signal POK. After that,
An address is specified for the graphic memory section 101, and data stored in the graphic memory i701 is retrieved.

Figure 6 is a detailed circuit configuration diagram of the nine coordinate generation circuit 4 shown in Figure *1. The coordinates of both screens of the television 14 are represented by X1 in the horizontal direction and Y in the vertical direction. This coordinate generation circuit 4 includes a 1-interrupt signal generation circuit 401, an X color: yfi40J, a Y counter 40B, an X register 404. 6 interrupt signal generation circuit 4art2 consisting of Y register 4 (115) outputs a signal obtained by amplifying a good signal output from light pen 15 with amplifier 16, and 1ii output from synchronization signal generation circuit 2.
The primary clock signal t) OK l2 and the vertical synchronizing signal v8 are supplied. Further, the interrupt signal IRR output from this side interrupt signal generation circuit q401 is supplied to the arithmetic control section 1. X counter 40
A horizontal synchronizing signal) 18 is supplied to the clear terminal OLH of the Y counter 40B, and a vertical synchronizing signal (No.
The clock terminal OKt2 of the counter 401 is supplied with the pixel clock signal POK, and the clock terminal OK of the X counter 403 is supplied with the horizontal synchronization signal H8. The interrupt signal generation circuit 401 outputs the clock terminal OK of the X register 404 and the X register 405. When the interrupt signal IrtR is supplied, the contents of the X counter 401 and the Y counter 40B are loaded into the X register 404 and the X register 405, respectively (=). The contents are the address data XAD and Y, respectively.
As the address data YAD, the X address counter 103 of the graphic memory capital 701 shown in Figure 4 is used. Y address counter 7041: ζ2 to be supplied.

The operation of the coordinate generating circuit 4 configured as above will be explained using the timing chart shown in FIG.

The X counter 402 is cleared by the horizontal synchronization signal H8,
l [lIl The count has been increased with the original Kuroku Hakugo POK. In addition, the Y counter 4 (73) is counted up by the Kei I11 synchronization signal H8.Here, when light is detected by the light pen IJ and a signal is output, an interrupt signal is sent from the 5 interrupt signal generation circuit 401. IRR is output.This is C2, x register 404.Y register 40
No. 5= is the X counter 402 and the X counter 40, respectively.
2 is loaded, and the X and Y address counters vos, vo of graphic memory 1 are loaded as write address information.
z respectively. 9. Interrupt signal IRR1
The arithmetic control unit 1 outputs the date signal LOD shown in FIG. 2, 1-bit data is written corresponding to the address C2 at the position where the light pen 15 detects light on the screen of the television 14. Also, the interrupt signal IR& is generated by the appearance of the primary vertical-network signal v8. cleared.

FIG. 8 is a detailed circuit diagram of the two-and-nine cover turn memory 1 and the character recognition section 6 in FIG. This is the input cover turn memory section. This input pattern memory section 501 is.

X address counter 502 and X address counter 5
01 to be addressed. The data input terminal INI of this input cover turn memory section jO1
= is the input data signal ID output from the calculation control unit 1
62 so that the program 1 is supplied. The load terminal LD of the X address counter 502 and the X address counter 503 is supplied with a load signal LODI that is output four times in response to the interrupt signal IRR, and this load signal LODX is output. Then, the X address counter 502 and the Y address counter 1501 are set to two, respectively, as shown in FIG.
In addition, a clear signal is supplied from the character recognition section 5 to the clear terminal OLR of this X and X address counter 5o2゜50S, and the clock terminal 0K (- is The character recognition unit 6 supplies a four-value code.

The operation of writing data to the input cover turn memory 562 configured as described above will be explained using the tie-up chart shown in FIG. 9). Figure 6: The 90% input signal IRR is supplied from the coordinate generation circuit 4 which adds the number 2.
(If the input data signal ID 1 is set to high level for two reasons, 62.

Outputs the load signal LODI. therefore.

X address counter 5o2 and Y address counter 5
The os42 receives X address data XAD and Y address data YmD from the coordinate generation circuit 4, respectively. Then, data is written to the address of the input pattern memory section 501 (2).In other words, this input pattern memory section 101 has the following data
Same content as 1, i.e. 2 Itpen 15 TV 14
The trajectory on the second side of the scene is written.

Next, the operation when reading data from the input cover turn memory 5 sections 2 will be explained using the tie-setting chart shown in 9th factor 1B). first.

A clear signal 0LAR is output from the character recognition section C, and
Address counter tro2 and Y address counter 5
Enhiragi of oJ is cleared. Then, clock signals XOK and YOK are supplied to the X address counter 5o2 and the Y address counter 5oxt, respectively, and the data written in the input pattern memory section 601 is read out. The data read in this way is the character ia
! Oribe Oriiri 6be supply and recognition are performed.

This letter W! The result of integration in slave section 6 is sent to arithmetic and control section 1 via connection line 6m.Although not shown in the figure, pattern processing is carried out in section 6. The ability to quantify circuits and feature similarities,
It includes a dictionary memory and the like that serve as reference data for this identification.

FIG. 10 is a fraudulent circuit diagram of the video memory 3 shown in FIG. This video memory section sep is designed so that the output of the OR circuit 21 shown in FIG. It is now possible to do so.

The X address counter 302 is cleared by the horizontal synchronizing signal H8, and is incremented at every pixel clock of 4 MPOK (increased to 2).
is cleared by vertical synchronization signal ■8, and horizontal synchronization signal H8
It is becoming more and more likely to be counted up. code 10
4 is the write synchronization circuit.

A write command signal WOM, an image clock signal POK, and a vertical synchronization signal 8 are supplied, and a write enable signal WIN is supplied to the video memory section 301. Flip 7 is designated by J05.
0, the output of the video memory sa01 is output in synchronization with the pixel clock signal POK.

The operation of writing data to the video memory configured in this manner will be explained using the timing chart shown in FIG.

When the write command signal WOM is output, a signal W8 indicating an IF writing state (not shown in FIG. 10) is set to 1.0 in synchronization with the vertical synchronizing signal v8. Then, the horizontal synchronization signal iIs is cleared and the AX address counter 302 is cleared.

The pixel clock signal POK (is counted up sequentially from 2). After this pixel clock signal pOKtJy1, the write enable signal tRN is set to 7. Alternatively, the output of the character generator 9 is written to the video memory section 30162.The contents of the video memory section 101 are written to the video signal generation circuit from the 7 lipfrog 305 via the connection line Ja in synchronization with the pixel clock signal)'OK. 10.

FIG. 12 is a circuit configuration diagram of cassette tape recorder 1# and its peripheral parts. cassette tape recorder 19
includes a motor drive unit 1#1% amplifier 191 and the like for running the tape of the cassette tape 191, and a control signal is supplied from the unit count control unit 1 via the connection line 1g. In addition, the cassette tape 191 includes
Control information for the arithmetic control unit 1 (2) and audio information for audio output from a speaker (not shown) of the television 14 are written.The information written on this cassette tape 1#1 is so that it is output (2).

(9) Whether the information read from the cassette tape 191fp is control information or audio information is determined by the arithmetic control unit 1 through the filter 101 and the /D (analog/digital) converter 102. It is designed to decode the data supplied through the register 103 and determine whether it is control information or audio information. When the arithmetic control section 1 decodes the data and determines that it is audio information, it outputs a switch changeover signal 8WT and releases the switch 104f to the audio output side. f When the voice information is supplied, the arithmetic control section 1.

The information is transmitted to the audio FM circuit 12 via the connection line Jfie.
It is set to output to .

7. The operation of the above embodiment will be explained. Considering the state immediately after the power is turned on for the television 14, the user 2 and the television 1
Using the built-in speaker, the user on screen 4 starts a conversation between the user and the screen on TV 14 by transmitting information from the audience. The start of this dialogue can proceed more smoothly from the television 14. It would be best if the information for this start could be built into the arithmetic control unit 1, but the information that can be built in is limited in terms of power and space, so it is kept to the minimum necessary (two pieces).

Much of the information for the initiation procedure is stored on an external storage medium, such as the cassette tape 191 in the cassette tape recorder 19.

The state of control of this cassette tape recorder 19 is shown in the flowchart of FIG.

That is, the arithmetic control unit 1 sends a signal for starting the cassette tape to the motor 51 of the cassette tape recorder 19.
91, page 619J.

The cassette tape 191 is run and the contents written on the tape are read out.The cassette tape 191 has control information or data and audio information written to the arithmetic control section 1, and the pressure information is read out. Audio information?
Since the frequency bands written on the tape are different, it is difficult to determine whether the signal is sent to the calculation control unit 1.
It is done by two. That is, the filter 101 shown in FIG. 12 allows only the signal to the calculation control section 1 to pass. Note that when comparing the frequency of the normal audio signal and the signal to the arithmetic control unit 1, the signal supplied to the arithmetic control unit 1 is higher.Since the output from the filter 101 is an analog signal, it is an analog digital signal. A series of digital signals converted into digital signals by the converter 101 are temporarily stored in the register 103 as a multi-bit code signal so that the arithmetic control unit 1 can easily interpret them. Register I
The 11 product to OJ is performed by detecting the first period signal on the tape (secondarily, by reading W4 of the MU/D converter 101 of this synchronization signal. The data found in the register 103 is According to the data set information from
Since the second control command is taken in and the arithmetic control section 1 decodes the control command, it can be determined whether the next written content is voice information. As a result of the deciphering,
If it is a voice command, the arithmetic control unit 1 releases the switch 104 shown in FIG. 12 to the voice output side and outputs the voice.This voice output is continued until the control command is detected. If the control command is not a voice command, it is determined whether the next written data is 1-stroke ik1 display data or not. 1-stroke thl! ! ! If the data is displayed, set the character memory address counter 802 shown in Figure 2, and input the screen data to the character memory 8.
Store it in As a result, the contents of character memory 8 are transferred to character generator 9. It will be displayed on one side of the television 14 via the video memory 3.

The display on one side of the television 14 has nothing to do with the data on the cassette tape 191. Unless the control command is a voice command or screen display data.

The control command is the control data that follows the control command,
The control data is used to receive commands from the user to control the cassette tape or input from the light pen 18. The operation under the above cassette control is as follows, and its 70-chart is shown in Figure 13 (
It's been double-crossed.

Next, from the arithmetic control unit 1 to the character memory 8 and the color information memory 1
The data transfer NI= to 1 will be explained.

The data in the character memory 8 and the color information memory 11 are those read from the above-mentioned cassette tape recorder 19, or the data of the 0 character memory 8 and the color information memory 11 which are the result of the X character V being recognized in the X character part i part 6. The flowchart in FIG. 14 shows how data is written to the 1-color information memory 17. In other words, the arithmetic control section 1 sets the color information of a figure in the one-color information memory 17.
is generated and one color information message is sent to the address counter 114 @0
”, the color information data is sent as the memory input data DA, and the color information for the figure memory 2c is set to address θ of the color information memory section 171. That is, the color for the figure (the color for the two is O in this embodiment). Address page: The stored color is 2.Sara 6: Character data t to be displayed.

In the above four ways, this time write a text memo IJ801ft'J4
1 after setting the selected 1 character memory address counter 802
The operation of 0 or more in which color information data is set in the color information memory unit 801 corresponding to each character data C2 written to the character memory unit 801 is shown in the flowchart of FIG. 14 in the 0 character memory unit #01. , information memory section 171
The reading is started by the synchronization signal from the synchronization signal generation circuit 2. This synchronization signal is the seat-synchronization signal V8.
These are the horizontal synchronization signal H8 and the pixel clock signal POK. Vertical synchronization signal VS is character memory address counter 8021
The horizontal synchronization signal H8 and the Ii & Ii nest clock signal POK initialize the color information memory address counter 174.
is manually input to the sub-counter 80J, and this sub-counter 103 generates a clock position for each character. ¥: The character memory section BOX and the color information memory section 171 are controlled by the clock signal (=) of this sub-counter 803. Also, if the result read from the character memory section 801 is blank, the planter detection section xrs generates a gate signal. Upon receiving this gate signal, the gate circuit 112 sets the θ address of the color information memory 171. Consequently, the color information memory section 111 transfers the color information to the figure memory section 701 (the color information for the two is output.

Character memory section 801 (The stored data is sent to the character generator 9 and output as a one-character dot pattern. The y counter 901 generates a control signal in the vertical direction.The control signals of the meat counters 901 and 901 and the read data O1 from the character memory 8
A horizontal dot pattern is extracted from l01 in synchronization with the pixel clock signal POK and sent to the OR circuit 21. The output of the OR circuit 21 is then written to the video memory section 301. This video memory section 30
For 1.

All the information to be displayed on the screen is stored and this content is displayed on the screen (second video memory s30) is integrated with the x-shaped memory section 8012 and the color information memory section 111,
X address counter 5oxY address counter shown in FIG. 10! (13 is the address counter 174.11 of each of the character memory section 801 and the color information memory section 111.
It shows the same position on one side as 02. video memory 3
The output of the video memory 3 prompts the color signal generation circuit 18 to generate a color signal (2) and becomes a video signal. That is, the output of the video memory 3 is sent to the video signal generation circuit 10 as video information, and the color information memory 11 The color signal generated from the f!-signal modulation circuit 1 is sent to the f!-signal modulation circuit 1].The video signal generation circuit 10 and the color signal generation circuit 11 generate a composite video signal of the NT80 system. death,
The signal is transmitted to the radio frequency modulation circuit IS, for example, to the television 1.
2 channel ms band television FlAe in 4
The operation of 0 or more, which is output as a number signal, is carried out along with the content 62 programmed on the cassette tape 191-2, and a message is sent to the operator on the screen of the television 14, or as a voice. Output.

The operator performs the work according to message C2.

For example, when an operator responds to a message using the light pen 15 (two operations will be explained). Therefore, the arithmetic control section 1 sends a luminance signal to the color signal generation circuit 18 and the video signal generation circuit 1# through the signal line 1K, so that both images are fully scanned. As a result, it is possible to detect the exact position where the light pen 15 is scanning the blood IIi.The signal from the light pen 15 is amplified by the amplifier 16, and a binary signal is extracted from this amplified fiFl-. It will be done.

In the position S generating circuit 4, when a signal is generated so that the rask position is stored in the 62 Interrupt signal IR4 or interrupt signal generation circuit 40
1, and the 2 star position at that time is the X register 404.
, are taken into the Y register 405. This interrupt signal Il is sent to the arithmetic control section 1, and the arithmetic control section 1 is sent to the fifth
As shown in Figure (C) (2. Excessive empty time of the rasp scan is found in Figure 4 (= X address counter 7103 of the figure memory section 701 shown. Y address counter 102 is , and write the scanning position of the 1-figure memory section 101 and the light pen 15.

The interrupt signal from the light pen 15 is generated only once corresponding to the vertical 1ik -1 period signal vS (16,6m5
) # period), the figure memory section 701 G= stores the scanning locus of the light pen 15, and the figure memory 7 is controlled by the synchronization signal from the synchronization signal generation circuit 2, When read out, its output is sent to the video memory 3 through the OR circuit 21. Color information C2 is read out from the graphic memory 1 and color information is added in the same way as in the case of one character data.

Therefore, the scanning signal of the light pen 15 is also outputted and displayed (=immediately in two image directions) in the same way as the character data.

Next, the recognition of characters input from the light pen 15 will be explained. The scanning locus of the light pen 15 is determined by the interrupt signal IR1c generated from the interrupt signal generation circuit 401 as in the case of the graphic memory 1.
By loading the outputs of the registers 404 and 4011 into the X address counter 1101 and the Y address counter 501, light pen scanning information is written and stored in the input cover turn memory section. Input cover turn memory section 5
The content of 01 is immediately (two letters I&!lI1 part C (two)
The image is scanned, and the light pen 15 is used to punch out circular letters or figures.

The g-result of x-character recognition *St is sent to the arithmetic control section 1. The arithmetic control section 1 displays the results of the deliberations sent in accordance with the control information read from the cassette tape as a message on the screen. As mentioned above, the graphic memory 1 is cleared by a command from the arithmetic control section 1, and the timing chart thereof is shown in FIG. 5 (Bl≦
There are two signs and twos. In addition, input/output between the arithmetic control unit 1 and other devices is also provided by an input/output interface 20 (which is interchangeable).

Note that if a color television tube is not used or if color selection is not required, the five-color information memory 17 is unnecessary.

Therefore, the character m-line device of the above embodiment has the following effects.

(1) TVs in ordinary homes can be used for teaching young children.

(2) Educational content includes practice of single characters, practice of kanji, etc.

(3) Free shape book - 2 can be written on, so it can be used as a means for improving children's ability to draw shapes or edges.

(4) It can also be used as an input/output means for a home computer.

As described above, according to the present invention, by using the display device W and a light pen, it is possible to draw a figure or a character on the display screen (with the light pen), and to recognize the g-shape as a character. A character recognition device can be provided.

[Brief explanation of the drawing]

Figure 1 is a schematic circuit configuration diagram of one embodiment of this invention, Figure 2 is a detailed circuit diagram of the color information memory and character memory in the same embodiment (Figure 3) (AI IBI is Figure 2C) A rounded tie diagram that explains the operation of a circuit that adds two,
FIG. 4 is a detailed circuit diagram of the graphic memory and character generator in the same embodiment C2, and FIG.
(0) IDI is a timing chart for explaining the operation of the nine circuits shown in FIG. Fig. 6 is a detailed circuit configuration diagram of the coordinate generation circuit in the same example. Fig. 7 is a timing chart for explaining the operation of the circuit where @6≦22+, and Fig. 8 is the same implementation. Example 1: Detailed circuit configuration diagram around the input cover turn memory and the 11 is a timing chart for explaining the operation of the circuit shown in FIG. 10, FIG. 12 is a circuit diagram of the opposite side of the cassette tape recorder, and FIG. 13 and 14 are flowcharts for explaining a part of the operation of the same embodiment. 1... Arithmetic control section, 2... Synchronization signal generation circuit, 3.
・・Video memory % 4・・Lower 1s generation circuit 5・・・
・Input cover turn memory, 6...Character gm section, 7...
Graphic memory, 1...x-character memo J, 9...character generator, 10...video signal generation circuit, 11...
・Color signal modulation circuit, 12...Audio FM circuit, JJ...
- Radio frequency modulation circuit, 14... Television, 15... Light pen, 16... Amplifier, 11... Erotic object memory, 18... Color signal generation circuit, 19... Cassette chip recorder, 20...I/O interface. Applicant's agent Patent attorney Suzue Takehiko

Claims (1)

[Claims] a display device, a light ben that detects light on the screen of the display device, a coordinate generation circuit that generates the coordinates of the scanning position of the light ben, and a scanning locus of the light ben on the screen of the display device (; a character memory in which character information is stored; a video memory in which the stored contents are stored as image information on the display device; The letter M!l1 is characterized by comprising a weaving circuit and a control means for controlling the entire device based on control information.
Placed at 11M.