JPS58219868A - Transmitting device of facsimile - Google Patents

Transmitting device of facsimile

Info

Publication number
JPS58219868A
JPS58219868A JP57101902A JP10190282A JPS58219868A JP S58219868 A JPS58219868 A JP S58219868A JP 57101902 A JP57101902 A JP 57101902A JP 10190282 A JP10190282 A JP 10190282A JP S58219868 A JPS58219868 A JP S58219868A
Authority
JP
Japan
Prior art keywords
code
image signal
encoding
circuit
codes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57101902A
Other languages
Japanese (ja)
Other versions
JPH0134425B2 (en
Inventor
Toru Nitta
徹 新田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57101902A priority Critical patent/JPS58219868A/en
Publication of JPS58219868A publication Critical patent/JPS58219868A/en
Publication of JPH0134425B2 publication Critical patent/JPH0134425B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/41Bandwidth or redundancy reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To optimize the quantity of generation of file codes and to guarantee the recording time of the receiving side by transmitting the file codes in accordance with the variation of picture signal generating time. CONSTITUTION:An encoding circuit 2 specifies the setting of a minimum guarrantee bits to a counting counter 3, generates a synchronizing signal, encodes a picture signal, and then writes the encoded signal in a memory 4. After completing the encoding of one line, the encoding circuit 2 discriminates whether the counted value by the counting circuit 3 reaches a set value or not, and when the set value is not reached, writes the file codes in the memory continuously until the set value is reached. Consequently, the number of codes in a line exceeds the minimum guarantee bits and the one-line recording time of the receiving side can be guaranteed. Subsequently, the encoding circuit 2 discriminates a picture signal controlling signal; starts the encoding of one line when the signal is on, supervises the number of codes in the memory 4 in case of off and generates file codes when the number of codes is less than a prescribed number.

Description

【発明の詳細な説明】 本発明は、画信号の発生時間が可変で、かつ画信号を符
号化した符号情報にフィル符号全付加して伝送するファ
クシミリ伝送装置の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a facsimile transmission apparatus in which the generation time of an image signal is variable and in which a fill code is added to code information obtained by encoding the image signal and transmitted.

ファクシミリにおいては、画信号の冗長度を符号化によ
り抑圧して、能率よく伝送する事が行われている。こう
した符号化に際して、画信号の持つ冗長度により、符号
化効率が変わり、画信号によって単位時間あた夛の符号
発生量が変化する。
In facsimile, the redundancy of image signals is suppressed by encoding to efficiently transmit them. In such encoding, the encoding efficiency changes depending on the redundancy of the image signal, and the amount of codes generated per unit time changes depending on the image signal.

このため送信側において、符号を一定速度で伝送すると
き、画信号の発生速度より伝送速度が上回ってしまい、
符号の正常な伝送ができなくなることが起こる。又、受
信側においても、1ラインの記録時間は一定であるため
、記録時間を上回る速度で画信号が伝送されてくると、
記録不能になってしまう。
For this reason, on the transmitting side, when transmitting codes at a constant speed, the transmission speed exceeds the generation speed of the image signal,
It may happen that the code cannot be transmitted normally. Also, on the receiving side, since the recording time of one line is constant, if the image signal is transmitted at a speed exceeding the recording time,
Recording becomes impossible.

そのため、ファクシミリにおいては、第1図に示すよう
に1ラインごとにライン同期信号(以下。
Therefore, in a facsimile, a line synchronization signal (hereinafter referred to as "line synchronization signal") is transmitted for each line as shown in FIG.

EOLと称す)を挿入する。1ラインの画信号の符号が
少ない場合は必要数のフィル符号を画信号とEOLとの
間に付加する。そしてこれによって1ラインの信号とし
て最小限必要な符号数(以下、最低保障ビットと称す)
を確保する。例えば、送信側の画信号発生時間と、受信
側の記録時間が共にl Q mll /ラインで、伝送
速度が9600bp8のとき、最低保障ビットとして9
6ビ、ト必要であり、EOLと符号の和が966−p 
)以下の時はフィル符号を不足分付加することになる。
(referred to as EOL). If the number of codes for one line of image signal is small, a necessary number of fill codes are added between the image signal and EOL. As a result, the minimum number of codes required for one line signal (hereinafter referred to as minimum guaranteed bits)
ensure that For example, when the image signal generation time on the transmitting side and the recording time on the receiving side are both l Q mll / line and the transmission speed is 9600 bp8, the minimum guaranteed bit is 9
6 bits are required, and the sum of EOL and code is 966-p.
) In the following cases, a fill code will be added for the missing amount.

さらに一般のファクシz9においては、単に画信号を送
信するだけでなく、必要な文字譚報を自身で作シ出し、
画情報と文字ttwt−合成して送信する事が行われて
いる。この場合、画情報も文字情報も主走査方向に1ラ
インごとの画信号として符号化されるが、画情報と文字
情報で画信号の発生時間が異なる事がある。そして、最
低保障ビット数を決める場合には最も遅い発生時間に合
わせる必′要があるので、速い発生時間の画信号の時に
は、フィル符号を多く伝送する事になC,tすます通信
コストが高くなる等の問題があった。
Furthermore, the general facsimile Z9 not only transmits image signals, but also creates the necessary text reports by itself.
Image information and text ttwt are combined and transmitted. In this case, both the image information and the character information are encoded as an image signal for each line in the main scanning direction, but the generation time of the image signal may differ between the image information and the character information. When determining the minimum guaranteed number of bits, it is necessary to adjust it to the slowest generation time, so when the image signal has a fast generation time, it is necessary to transmit many fill codes, which reduces the communication cost. There were problems such as high prices.

本発明はこのような不具合を除き、送信側7アクシミI
JO画信号の発生時間が大幅に変化する場合も、常に一
定速度で符号が送出され、受信側ファクシミリで正常に
記録でき、かつ伝送能率の低下を最低にすることが可能
となる最適な量のフィル符号を付加できるファクシミリ
を提供すること金目的とする。
The present invention eliminates such problems and the transmission side 7 axis I
Even if the generation time of the JO image signal changes significantly, the code is always sent at a constant speed, the receiving facsimile can record the code normally, and the optimum amount of code is required to minimize the reduction in transmission efficiency. The objective is to provide a facsimile machine to which a fill code can be added.

本発明の特徴は、符号の計数を行い任意に設定できる基
準値に達すると計数を中止し基準値に達した事を示す計
数回路と、EOL発生発生1芳信符号化およびフィル符
号の発生を行う符号回路と、符号化回路が出力する符号
−を書込み伝送タイミングに同期して符号を読み出し、
内部符号量が一定の値以下になるとその事を外部に示す
事のできる7アーストイン・ファーストアウト機能を持
つメモリ回路(FIFOと略す)vf−含んで構成され
、符号化回路は1ラインの符号化終了後、かつこのFI
−円内の符号量が規定値以下になzft時のみにこの計
数回路を用いて、受信側ファクシミリが記録不能になら
ない様にフィル符号を送出するファクシミリにある。
The present invention is characterized by a counting circuit that counts codes and stops counting when a reference value that can be set arbitrarily is reached and indicates that the reference value has been reached, and that performs EOL generation generation 1 transmission coding and fill code generation. A code circuit and a code outputted by the coding circuit are written and read out in synchronization with the transmission timing.
It consists of a memory circuit (abbreviated as FIFO) with 7 first-in, first-out functions that can indicate this to the outside when the internal code amount falls below a certain value, and the encoding circuit encodes one line. After finishing, Katsuko FI
- This is a facsimile machine that uses this counting circuit only when the code amount within a circle is less than a specified value (zft) and sends out a fill code so that the receiving facsimile machine does not become unable to record.

以下実施例により本発明の詳細な説明する。The present invention will be explained in detail below with reference to Examples.

第2図は、本発明の一実施例のプロ、り構成図を示した
もので、1は画信号発生回路、2は符号化回路、3は計
数回路、4はFIFOである。1の画信号発生回路は2
の符号化回路に対して、画信号を1ラインを単位として
画信号を発生する。
FIG. 2 shows a block diagram of an embodiment of the present invention, in which 1 is an image signal generation circuit, 2 is an encoding circuit, 3 is a counting circuit, and 4 is a FIFO. 1 image signal generation circuit is 2
An image signal is generated for the encoding circuit in units of one line.

第3図は、1の画信号発生回路からの画信号発生の様子
を示したタイムチャートである。1の画信号発生回路は
2の符号化回路に対して、画信号制御信号ONにより、
符号化要求と画信号がある事を示し、画信号制御信号O
FFによル、初期状態もしくは符号化終了要求金示す。
FIG. 3 is a time chart showing how the image signal generation circuit 1 generates the image signal. The image signal generation circuit 1 provides the encoding circuit 2 with the image signal control signal ON.
Indicates that there is an encoding request and an image signal, and the image signal control signal O
The FF indicates the initial state or the request for completion of encoding.

画信号制御信号ONの区間はlラインの符号化処理を行
い、画信号制御信号OFFの区間は1画信号発生時間で
、時間は不定で変化する。
During the period when the image signal control signal is ON, encoding processing for 1 line is performed, and during the period when the image signal control signal is OFF, the period is the generation time of one image signal, and the time changes indefinitely.

2の符号化回路は、E(JLの発生と画信号の符号化と
フィル符号の発生機能を有し、各符号の発生速度は伝送
速度に比べて充分速いものとする。
The encoding circuit No. 2 has the functions of generating E(JL, encoding the image signal, and generating fill codes, and the generation speed of each code is sufficiently faster than the transmission speed.

3の計数回路は、受信側の記録時間と伝送速度の積によ
って決まる敏低保証ビ、ト数の設定が2の符号化回路の
指示により行うことが可能で、2の符号北回□路が4の
FIFOに符号を1込む時、同時に書込む符号の計数を
行い、計数値が先に設定された最低保証ビット数に達す
ると、2の符号化回路に達した事を示し、以後の計数を
中止する機能を有する。
The counting circuit 3 can set the number of bits and bits guaranteed to be low and low, which is determined by the product of the recording time on the receiving side and the transmission speed, according to the instructions from the encoding circuit 2, and the code north circuit □ route of 2 can be set. When writing 1 code into FIFO No. 4, the number of codes to be written at the same time is counted, and when the counted value reaches the minimum guaranteed number of bits set earlier, it indicates that it has reached the encoding circuit No. 2, and subsequent counting is performed. It has the function to cancel.

4の、)’IFOは、 2の符号化回路が出力する符号
tS込み、伝送タイミングに同期して符号を読み出し、
内部符号竜が規定値以下になると、その事を2の符号化
回路に示す事ができるファーストインファーストアウト
機能を持つメモリ回路である。
4)'IFO includes the code tS output by the encoding circuit 2, reads out the code in synchronization with the transmission timing,
This memory circuit has a first-in first-out function that can indicate this to the encoding circuit 2 when the internal code value falls below a specified value.

規定値は、2の符号化回路が符号化処理を行っている間
に4のFIFO内の符号が無くなる状態(アンダーフロ
ー状態と称する)を防ぐのに必要な最低限の符号1.2
の符号化回路における1ラインの符号化符号量が最少の
画信号の符号化処理時間と伝送速度の積によシ決まる。
The specified value is the minimum code of 1.2 necessary to prevent the state in which the code in the FIFO of No. 4 runs out while the encoding circuit No. 2 is performing encoding processing (referred to as an underflow state).
The amount of code encoded for one line in the encoding circuit is determined by the product of the minimum image signal encoding processing time and the transmission speed.

4のFIFOのメモリ容量は、規定値以上の容量とする
The memory capacity of FIFO 4 shall be greater than the specified value.

次に本実施例の動作を説明する。Next, the operation of this embodiment will be explained.

1の画信号発生回路から2の符号化回路に対して、画信
号制御信号がONになると、1ラインの符号化を開始す
る。2の符号化回路は3の計数回路に対して最低保証ビ
ットの設定を指示した後、EULの発生1画信号の符号
化を行い、4のFIFOに書込む。又3の計数回路は書
込まれる符号の計数を行う。2の符号化回路は、1ライ
ンの符号化が終了すると、3の計数回路が設足値に達し
ているかの判定全行い、達している場合はフィル符号は
発生しない、文運していない場合は、達するまでフィル
符号t−4のFIFOに書込む。以上の処理により1ラ
インの符号数は、最低保証ビット数以上となシ、受信側
の1ライン記録時間を保証できる。
When the image signal control signal is turned ON from the first image signal generation circuit to the second encoding circuit, encoding of one line is started. After the encoding circuit 2 instructs the counting circuit 3 to set the minimum guaranteed bit, it encodes the EUL generated one-picture signal and writes it into the FIFO 4. Further, the counting circuit 3 counts the codes written. When the encoding circuit 2 finishes encoding one line, the counting circuit 3 judges whether it has reached the set value, and if it has, the fill code will not be generated. writes to the FIFO with fill code t-4 until it is reached. Through the above processing, the number of codes for one line is not less than the minimum guaranteed number of bits, and the recording time for one line on the receiving side can be guaranteed.

次に2の符号化回路は、画信号制御信号を判定し、ON
の場合は1ラインの符号化を開始′する。
Next, the encoding circuit 2 determines the image signal control signal and turns ON.
In this case, encoding of one line is started.

又OFFの場合は、画信号制御信号0NK−待ちつつ、
4のFIFO内の符号量の監視を行い、符号量が規定値
以上であれば何もせず、規定値以下のときフィル符号を
発生する。
In addition, in the case of OFF, while waiting for the image signal control signal 0NK-
The amount of codes in the FIFO of No. 4 is monitored, and if the amount of codes is above a specified value, nothing is done, and when it is below the specified value, a fill code is generated.

本処理は画信号制御信号がONになるまで継続する。This process continues until the image signal control signal is turned ON.

従って、画信号発生時間が変動しても、変動に応じた量
のフィル符号を送信する事になる為、フィル符号発生量
は最適化される。
Therefore, even if the image signal generation time fluctuates, the fill code generation amount is optimized because the amount of fill codes corresponding to the fluctuation is transmitted.

本発明は以上説明したように、フィル符号発生を2種類
の処理によシ行ない、受信側の記録時間を保障し、かつ
画信号の発生周期がどの様に変動しても、伝送速度が符
号発生量を上回る事のない最適な量のフィル符号を送出
する事力五できる。
As explained above, the present invention performs fill code generation using two types of processing, guarantees the recording time on the receiving side, and maintains the transmission speed according to the code no matter how the generation cycle of the image signal changes. It is possible to send out an optimal amount of fill codes without exceeding the amount generated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、ファクシミリで伝送される符号の形態を示し
た図、第2図は、本発明の一実施例を示すプロ、り構成
図、第3図は、画信号発生の様子を示すタイムチャート
、である。 なお図において、 1・・・・・・画信号発生回路、2・・・・・・符号イ
ヒl包路、3・・・・・・計数回路、4・・・・・・メ
モリ回路、である。
Fig. 1 is a diagram showing the format of codes transmitted by facsimile, Fig. 2 is a professional configuration diagram showing an embodiment of the present invention, and Fig. 3 is a time diagram showing how image signals are generated. It's a chart. In the figure, 1... image signal generation circuit, 2... code IHI envelope, 3... counting circuit, 4... memory circuit. be.

Claims (2)

【特許請求の範囲】[Claims] (1)画信号が一走査毎にまとめて符号化され、かつ各
走査毎に同期信号が挿入され、該画信号の前記一走査毎
の符号長が異なるファクシミリ伝送装置において、該画
信号の送受信時に一定容量のバッファレジスタを介して
該画信号が送受信されることを特徴とするファクシミリ
伝送装!・
(1) Transmission and reception of the image signal in a facsimile transmission device in which the image signal is collectively encoded for each scan, a synchronization signal is inserted for each scan, and the code length of the image signal for each scan is different. A facsimile transmission device characterized in that the image signal is transmitted and received via a buffer register with a constant capacity.・
(2)画信号の発生する時間が変化し、骸画信号の符号
化を行うファクシミリ伝送装置において、エンドオブラ
イン符号を発生する要素0画信号を符号化し呼信号符号
を発生する要素およびフィル符号を発生する要素とから
なる符号化回路と、該符号化回路が発生する符号の計数
を行い、計数値が、任意に設定できる基準値に達すると
以後の計数を中止し、基準値に達した事を示す計数回路
と、該符号化回路が発生する符号を書込み、伝送タイミ
ングに同期して書込まれた符号を読み出し、かつ、内部
符号量が規定の値以下になるとその事を外部に示す事の
できるファーストインファーストアウト機能金持つメモ
リ回路とを包含し、該符号化回路において、1ライ゛ン
の符号化が終了した時、該計数回路が基準値に達しない
場合達するまでフィル符号を発生した後に、次の画信号
が発生しなくて、該メモリ回路内の符号量が規定の値以
下になった場合のみ、フィル符号の発生を行う事を特徴
とする特許請求の範囲第(1)項記載のファクシミリ伝
送装置。
(2) In a facsimile transmission device in which the time at which the image signal is generated changes and the skeleton image signal is encoded, the element that generates the end-of-line code, the element that encodes the 0-image signal, and the element that generates the call signal code and the fill code. An encoding circuit consisting of a generating element and a code generated by the encoding circuit are counted, and when the counted value reaches a reference value that can be set arbitrarily, subsequent counting is stopped and it is determined that the reference value has been reached. Writes the code generated by the counting circuit and the encoding circuit, reads the written code in synchronization with the transmission timing, and indicates externally when the internal code amount falls below a specified value. and a memory circuit with a first-in-first-out function that can perform a first-in, first-out function, and in the encoding circuit, when the encoding of one line is completed, if the counting circuit does not reach the reference value, generates a fill code until the reference value is reached. Claim (1), characterized in that the fill code is generated only when the next image signal is not generated after the image signal is generated and the amount of code in the memory circuit becomes less than a specified value. The facsimile transmission device described in Section 1.
JP57101902A 1982-06-14 1982-06-14 Transmitting device of facsimile Granted JPS58219868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57101902A JPS58219868A (en) 1982-06-14 1982-06-14 Transmitting device of facsimile

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57101902A JPS58219868A (en) 1982-06-14 1982-06-14 Transmitting device of facsimile

Publications (2)

Publication Number Publication Date
JPS58219868A true JPS58219868A (en) 1983-12-21
JPH0134425B2 JPH0134425B2 (en) 1989-07-19

Family

ID=14312840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57101902A Granted JPS58219868A (en) 1982-06-14 1982-06-14 Transmitting device of facsimile

Country Status (1)

Country Link
JP (1) JPS58219868A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6447170A (en) * 1987-08-17 1989-02-21 Fuji Xerox Co Ltd Facsimile equipment

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5533370A (en) * 1978-08-29 1980-03-08 Mitsubishi Electric Corp Facsimile signal transmission system
JPS5711575A (en) * 1980-06-25 1982-01-21 Ricoh Co Ltd Decoding and reproducing system for facsimile signal
JPS5773569A (en) * 1980-10-27 1982-05-08 Ricoh Co Ltd Facimile transmission system
JPS57129580A (en) * 1981-02-04 1982-08-11 Ricoh Co Ltd Facsimile control system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5533370A (en) * 1978-08-29 1980-03-08 Mitsubishi Electric Corp Facsimile signal transmission system
JPS5711575A (en) * 1980-06-25 1982-01-21 Ricoh Co Ltd Decoding and reproducing system for facsimile signal
JPS5773569A (en) * 1980-10-27 1982-05-08 Ricoh Co Ltd Facimile transmission system
JPS57129580A (en) * 1981-02-04 1982-08-11 Ricoh Co Ltd Facsimile control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6447170A (en) * 1987-08-17 1989-02-21 Fuji Xerox Co Ltd Facsimile equipment

Also Published As

Publication number Publication date
JPH0134425B2 (en) 1989-07-19

Similar Documents

Publication Publication Date Title
US4887224A (en) Image data processing apparatus capable of high-speed data encoding and/or decoding
JPS6346628B2 (en)
US5737633A (en) Serial data receiving device having a memory for storing a reception permit signal which enable or disable the device from hand-shaking with the transmitting device
US5228129A (en) Synchronous communication interface for reducing the effect of data processor latency
JPS58219868A (en) Transmitting device of facsimile
EP0285335B1 (en) Data communication system and method
JPH0145270B2 (en)
JPS6051065A (en) Picture signal processing system
JPH0123987B2 (en)
JP2808964B2 (en) Encoded data receiving circuit
EP0606076A1 (en) Reader for a facsimile apparatus
KR930004100B1 (en) Method for embodying full duplex communication protocol
JP2850737B2 (en) Data transmission / reception method and device
JPS5926691Y2 (en) Facsimile signal transmission equipment
JPH01280936A (en) Coding/decoding processing control system
JPH1056544A (en) Communication terminal device
JPS6252983B2 (en)
JPH06303346A (en) Facsimile equipment
JPH0340558A (en) Facsimile equipment
JPS6051064A (en) Picture signal processing system
JPH0544222B2 (en)
JPH0374066B2 (en)
JPS6210067B2 (en)
JPS58187068A (en) Facsmiile device
JPH05236179A (en) Facsimile store exchange