JPS58215877A - Image pickup device - Google Patents

Abstract

PURPOSE:To lead out signals with the same level in respective modes, by giving a difference in amplification factor to a read signal between a frame mode a field mode once a still mode is selected. CONSTITUTION:A read signal 1B from an odd-numbered cell of a CCD and a read signal 1A from an even-numbered cell are added together by an adder 40 when the frame mode is effective in still mode, and the sum signal is equalized in level by an amplifier 41 to a read signal 1C in field mode. The signal 1C is sent directly to a switch circuit 42 without passing through the amplifier 41 in field mode; the circuit 42 is connected to a side (a) in frame mode and to a side (b) in field mode. This constitution eliminates the difference in read signal level between the frame and field modes.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an imaging device using a solid-state imaging device.In recent years, so-called two-dimensional video, which is a miniaturized video camera and VTR, has been actively developed.

The miniaturization of such electronic devices is particularly dependent on semiconductor technology. Due to such advances in semiconductor technology, the photoelectric conversion section of the aforementioned video camera is also about to be replaced from an image pickup tube to a solid-state image pickup device. Currently, solid-state image sensors have many features compared to image pickup tubes.

In other words, because it is a solid-state device, it is small, has low power consumption,
With the establishment of technology for solid-state image sensors that have many features such as mass production and no burn-in,
With the development of ultra-compact magnetic recording devices, the conventional silver halide photography technology that uses silver-lead film as a recording medium is being eclipsed by magnetic photography or electronic photography technology that does not require development processing. VTRK, which is the main use of VTRs, is used to record moving images, full images, and to display them on a TV. If we call still video something whose main purpose is to print it out on a printer, there is no big difference between movie video and stereo video, as their signal format is converted into a TV signal format. .

However, while movie video generally records the subject continuously, still video (c) captures the subject image instantaneously like a regular camera.
Iris, shutter.

A (', C, The responsiveness of white balance, etc. will need to operate quite differently, and in addition, the driving method of the solid-state image sensor will also be slightly different, so the current one optical system and one signal processing system However, there is a problem in that it cannot be used for both purposes.

In this case, it would be better to have separate camera parts for movies and stills, but it will only become cost-effective once such cameras become widespread. At present, it is advantageous to use both.

If the camera section is used for both movies and still images, problems arise with the method of accumulating charges in the solid-state image sensor and the method of reading them out. Solid-state imaging devices include MOS type, incline chive CCD (IL-CCD) * frame transfer type CCD (FT-CCD), but here we will use FT-CCD as the wooden structure of the device is not very relevant. Let me explain using an example.

The F T'-CCD has an imaging section consisting of photoelectric conversion cells that convert the light of the subject image into electric charge, a memory section that temporarily stores the signal type 2 charges from the imaging section, and It consists of a horizontal shift register section that reads out signal charges with timing matching the TV synchronization signal, an on-chip amplifier section that amplifies the signal charges from the horizontal shift register section 1-7, and outputs them as signal voltages. There is.

When using such an FT-CCD as a movie camera, the imaging unit only has one field period.

Photoelectric conversion is performed as described above, and the photoelectrically converted signal charges are transferred to a part of the memory by a vertical transfer pulse of several MHz during the vertical blanking period. Then, the signal charges in a part of the memory are transferred to the horizontal shift register part during the horizontal blanking period for every horizontal scan in the next field period, and read out as a CCD signal from the on-chip amplifier at the next stage. During this time, the imaging section is in a photoelectric conversion state. In other words, photoelectric conversion and vertical transfer are repeated for each field, resulting in a continuous video signal.

Next, if you use the Fl-CCD just described as a stay camera 7, image distortion will easily occur, because the TV signal is made up of one frame of video signal, and there is still one frame. Since one image is assembled using two fields (odd and even fields), that is, interlace operation, one frame signal due to photoelectric conversion at different times may cause image blur, especially for fast-moving subjects. occurs, resulting in a decrease in image quality.

There are two methods to eliminate these drawbacks:

The first method is to use signals of only odd fields (or rather only even fields). That is, this is a method in which the signal of the odd field is also used for the next even field. However, when such a method is used, the vertical resolution deteriorates, making it unsuitable for still images.

The second method is to double the number of vertical elements in the image sensor, and to provide a second horizontal shift register between the image sensor and a part of the memory, so that odd and even fields can be displayed simultaneously on the surface of the image sensor. It is a cell that uses a solid-state image pickup device that enables 11 direct readout and corresponds to both movie video and still video. As such a solid-state imaging device, the present applicant has filed a patent application in 1983-146.
It was proposed in issue 587.

FIG. 1 shows an imaging device with the following, and its operation will be briefly explained.

In Fig. 1, numeral 1 indicates a plurality of photoelectric conversion cells arranged in a matrix or an imaging section; 2 indicates a memory section that transfers and stores signal charges obtained in the imaging section; 3 indicates a signal obtained in the imaging section; A first horizontal/shift register 4 reads out the charge, a second horizontal shift register 4 reads out the signal charge stored in a part of the memory, and a first . This is an on-chip amplifier that amplifies the read signal of the second horizontal shift register. This tffi ('
! The i-Device as a whole uses frame transfer
C■) is formed. The number of cells in the vertical direction of the imaging unit 1 is 490. The number of cells in the vertical direction of memory part 2 is 24.
It is set at 5.

In the case of a movie video, the vertically adjacent 2 of the imaging unit 1
Signal charges for pixels are sequentially added up in the first shift register 3, transferred to the memory section 2, and read out from the second shift register 4 via the on-chip amplifier 6 as a signal IC. (This mode is called field mode.) In the case of still video, the signal charges of odd-numbered cells in the vertical direction of the imaging section 1 are read out from the first horizontal shift register 3, and the signal charges of even-numbered cells are read out from the second horizontal shift register 3. Horizontal shift register 4 reads out.

(The mode with is called frame mode).

With this configuration, if the feel mode is used, a completely interlaced signal can be obtained without loss of vertical resolution even in the case of still video. Therefore, the device shown in FIG. 1 can be applied to both movies and stills.

In the case of still video, reading in field mode is also possible at the expense of vertical resolution.

By the way, if you compare field mode and frame mode, you will notice that compared to field mode, which adds the signal charges of two cells, frame mode, which reads out the signal charges of each cell as is, has almost no signal charge. It becomes 1/2. In other words, the sensitivity of the camera will be reduced by one aperture stop.

Furthermore, the on-chip amplifier section is composed of MO8 elements, and considering that this MOS has poor low-frequency noise characteristics and the human eye can easily detect noise in the low-frequency range,
The S/N deterioration of one stop of aperture becomes a problem that cannot be ignored.

In addition, the number of horizontal elements in a solid-state image sensor is still insufficient, even with the current 390 or 570 elements, and there is a possibility that the number of horizontal elements will be increased in the future. It is expected that the size of the 2 optical system and the 8 optical system will gradually become smaller.
In this case, camera sensitivity becomes a very important issue.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to provide an imaging device that compensates for the difference in the level of a readout signal caused by a mistaken reading method from a solid-state imaging device.

Embodiments of the present invention will be described in detail below with reference to the drawings.

In the figure, reference numeral 11 denotes an FT-CCD having the structure shown in FIG. 1, and its imaging section consists of about 570 horizontal elements and about 490 vertical elements.

12 is CCDI 1 Dryno (-113 is CCD11
14 is an iris and shutter control circuit for controlling the amount of light incident on CCDI 1; 15 is a control circuit for switching between movie mode and stay mode. an AE control section that determines the iris aperture value and the shutter operating speed from the output signal of the first mode switching circuit (16 is the CCI);
Reference numeral 7 denotes an auto gain control section (hereinafter referred to as AGC) that variably controls the signal level when the signal level is low even if the AE control section 16 opens the iris. 18 is AGC1
A signal processing circuit consisting of a process circuit encoder circuit and a modulation circuit in order to convert the output signal of 7 into a recording signal,
19 is a recording head, 20 is a recording mechanism consisting of a motor, etc.
21 is a rotation control unit that controls the speed and phase of the motor of the recording mechanism 20 using control pulses from the synchronization signal generator 13;
22 is a Nant gate, 23 is an AND gate, 24 is a switch circuit, 25 is a second mode switching circuit for selecting whether to manually or automatically select the frame mode and field in the stay mode, and 26 is a circuit. A third mode switching circuit 25 selects frame mode or field mode when the manual mode is selected, and 30 is a switch circuit (output means) including an amplifier circuit.

Now 7. Q1 Movie mode is set to 1 using the 1 mode switching circuit 15.
1 is selected, the output of the switching circuit 15 becomes a low level (hereinafter referred to as "L"), and this signal causes the synchronization signal generator 13 to
generates the movie mode control pulse. That is, when a trigger switch (not shown) is pressed, power is applied to each circuit to start recording. Movie mode is continuous recording, so A E 1++ controls the iris and ACC17.
The J control section 16 performs feedback control with an appropriate time constant. The reading method of the CCD 11 is set to the field mode described above, and data is read out from the second horizontal shift register 4 in FIG. 1 via the on-chip lamp 6.

Next, when the first mode switching circuit 15 selects the stay mode, the output of the mode switching circuit 15 becomes a high level (hereinafter referred to as "H"), and outputs a control pulse for the stay mode to the synchronization signal generator 13. Instruct them to do so. The AE control unit 16 determines the shutter speed and iris aperture value,
It is transmitted to the iris shutter control circuit 14. Both the field mode recording and frame mode recording mentioned above are considered as the stay mode. When the field mode recording and frame mode recording are set to the automatic selection mode, the switch circuit 24 is connected to contact (a). In the automatic selection mode, when the AE control unit 16 detects that the subject is under low illuminance, the output line 27 becomes H''.

Then, the output of the Nantes gate 22 becomes "L", and the output of the AND gate 23 becomes "L", and the synchronization signal generator 13 is set to field mode in stay mode.When the subject is not yet in low illumination, the output line 27 is set to "L". The output of the Nant gate 22 becomes ``L'', the output of the AND gate 23 becomes ``H'', and the synchronization signal generator 13 is set to the frame mode in the stay mode.

When the second mode switching circuit is set to the manual selection mode, the switch circuit 24 is connected to the (b) side and follows the setting of the third mode switching circuit 26. The third mode switching circuit 26 can select field mode and frame mode 1ELt during the stay mode.

When the field mode is selected in the stay mode, a good S/+J image can be obtained even if the subject is under low illumination. Even if the subject is still in deep illumination, an image with a soft focus so-called blurring effect can be obtained.

Furthermore, when the frame mode is selected, high-resolution, sharp images can be obtained.

By the way, as mentioned above, in field mode, the first
The output of the second horizontal shift register shown in the figure is used, and in frame mode the output of the second horizontal shift register is used. Since the second horizontal shift register is used, each mode is switched by the switch circuit 30.
It will be held in The operation of the switch circuit 30 will be explained in detail below.

FIG. 3 shows a first embodiment of the switch circuit 30. In the figure, 40 is an adder, 41 is an amplifier, and 42 is a switch. In the frame mode, the read signals IA and IB are added together in an adder 40, and made equal to the level of the output signal 1C in the field mode in an amplifier 41. F・r
- In the field mode, the signal is sent directly to the switch circuit 42 without going through the amplifier 41. The switch circuit 42 is connected to the (a) side in the frame mode, and is connected to the (b) side in the field mode.
) side. By forming such a tl, a frame,
There is no difference in read signal level between each field mode. Furthermore, since the level is adjusted before being used in the AE control section 16, it is possible to prevent the subsequent stage circuit from becoming complicated.

4 and 5 show other circuit examples of the switch circuit 30.
', 30.

The example shown in FIG. 4 shows the gain adjustment of the on-chip amplifiers 5 and 6 of the CCD in the frame mode, the image capturing section 1, the memory section 2, and the like. Shift register section 3, 4 on-chip amplifier 5.
In order to keep the total gain of 6 constant, the signals IA and IB are
This is an example in which the signals are amplified at different ratios through separate amplifiers 43 and 44, and then added by an adder 45. The operation of the switch 46 is the same as the switch 42 in FIG. 3. In the example shown in FIG.
This is an example in which the level is lowered by the attenuator 48 to match the level with the frame mode read signal. In addition, 47
is an adder, and 49 is a switch.

The above was explained using FT-COD, but below is IL-COD.
The COD and MOS types will be briefly explained.

FIG. 6 is a schematic diagram of the interline transfer method (IL-COD). As shown in the figure, II, -CCD includes a light-receiving element 51 which is a photoelectric conversion section, a transfer gate (TG) which controls the transfer of information charges accumulated in the light-receiving element 51 to a vertical register 53, and a TG which receives light. The vertical register 53 temporarily stores the information charge from the element 51, and the information charge from the vertical register 53 is
It is composed of a horizontal register 54, an on-chip amplifier 55, etc. for reading out a CCD output signal every horizontal scanning period (LH).

Thinking about stay mode, after shooting,
That is, after the shutter closes, the information charges of the light receiving elements (indicated by nl, n2, . . . ) corresponding to the odd field are transferred to the vertical register 53 and converted into salt, and then sequentially output from the horizontal register 54 for each LH.
It is output from the on-chip amplifier 55 as an odd field CCD output signal. When all the odd field signals have been read out in this way, the CCD output signals of even fields (indicated by ml, m2, . . . ) are read out during the next even field period. Such an operation is referred to as a frame mode, and the information charge photoelectrically converted in the frame mode is referred to as C8.

Next, in the field mode in the stay mode, the information charges of a pair of adjacent odd and even fields are added in the vertical register 53, output to the horizontal register 54, and output from the on-chip amplifier 55. If the amount of information charge at this time is C, then CI--! -Ct.

As mentioned above, since the amount of accumulated charge is different between the frame mode of the stay mode and the field mode, the switch circuit 56 and the amplifier 5 are used to adjust the level of the CCD output signal.
7 is provided. The switch circuit 56 is connected to the active side in the frame mode, and the read signal is made to the same level as the field voltage by the amplifier 57 and sent to the AGC or the like.

FIG. 7 is a schematic diagram of a MOS type solid-state image sensor.

As shown in the figure, the MOS type is composed of a light receiving element 61, a vertical scanning circuit 63, a horizontal scanning circuit 62, and the like. M.O.S.
The operation of the mold is well known, so I will not explain it here, but since it is an X-Y scanning method, Reiki uses the frame mode that divides it into two fields as mentioned earlier, and the signal charge of two adjacent elements. A field mode obtained by addition can be easily configured.

Since the signal level read out at that time is naturally different between both modes, it is necessary to adjust the signal level in each mode.

Therefore, the level of the read signal in both modes can be adjusted by using the switch circuit 65 or not via the amplifier 66.

As described above, the present invention provides a photoelectric transformer 1 adjacent to a solid-state image sensor.
Although it has a first mode in which the signal charges within the cell are added and read out, and a second mode in which each signal charge in each cell is read out, the amplification factor for the readout signal in both modes is changed. , the signal can be extracted at the same level for each mode. Therefore, the configuration of the AE control section of the video camera is greatly simplified.

Furthermore, it is possible to prevent image deterioration due to differences in read signal levels.

Furthermore, as shown in FIG. 4, in the frame mode, "level adjustment" is performed between odd and even fields, so it is possible to prevent flicker from occurring when reading or writing on a TV receiver.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram of a frame transfer type CCI), Fig. 2 is a control circuit diagram of this embodiment, and Fig. 3. 4 and 5 are circuit diagrams showing the internal configuration of the switch circuit 30 of FIG. 2, FIG. 6 is a schematic diagram of an interline type CCD, and FIG. 7 is a schematic diagram of an MO8 type solid-state image sensor. In the figure, 1 is an imaging section, 2 is a part of memory, 3-digit first horizontal shift register, 4 is a second horizontal shift register, 1.
1 is a CCD, 13 is a synchronizing signal generator, 15 is a first mode switching circuit, 16 is an AE control section, 17 is an AGC, and 30 is a switch circuit.

Claims (1)

[Claims] In an imaging device having a solid-state image sensor in which a plurality of photoelectric conversion cells are arranged in a matrix, and an output means for extracting a readout signal from the image sensor, there is a method for adding and reading out signal charges in adjacent photoelectric conversion cells. 1 mode and a second mode in which signal charges of each of the photoelectric conversion cells are read out, and the output means changes an amplification factor for the readout signal depending on the first mode and the second mode. Imaging device.