JPS58212123A - Manufacture of single crystal thin film - Google Patents

Manufacture of single crystal thin film

Info

Publication number
JPS58212123A
JPS58212123A JP57094439A JP9443982A JPS58212123A JP S58212123 A JPS58212123 A JP S58212123A JP 57094439 A JP57094439 A JP 57094439A JP 9443982 A JP9443982 A JP 9443982A JP S58212123 A JPS58212123 A JP S58212123A
Authority
JP
Japan
Prior art keywords
film
polycrystalline
substrate
single crystal
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57094439A
Other languages
Japanese (ja)
Inventor
Masao Tamura
田村　誠男
Nobuyoshi Kashu
夏秋　信義
Naoji Yoshihiro
吉広　尚次
Shizunori Ooyu
大湯　静憲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57094439A priority Critical patent/JPS58212123A/en
Publication of JPS58212123A publication Critical patent/JPS58212123A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

Abstract

PURPOSE:To obtain the single crystal thin film to enable to extend an energy extent to afford favorably bridging epitaxy by a method wherein ion implantation is performed as to convert a polycrystalline silicon film adhered on a silicon substrate into an amorphous silicon film. CONSTITUTION:Thermal oxide films 2 are formed at the interval of 2mum accordng to normal photolithography technique on the (100) plane of the Si substrate 1. Then the polycrystalline Si film 3 is adhered on the whole surface using CVD technique, and a continuously oscillating Ar laser is scanningly irradiated with energy of 3.5W at the speed of 20cm/s from the upper part thereof. As a result, the polycrystalline Si film on the thermal oxide films 2 is molten, and grain size is enlarged, while the polycrystalline Si film on the Si substrate is not molten, and bridging epitaxy is not generated. Then Si<+> ion implantation is performed under the condition to convert completely the polycrystalline Si film into the amorphous silicon film only to the polycrystalline Si4 regions stacked on the single crystal Si substrate 1 using a proper mask pattern 5. Moreover irradiation of the continuously oscillating Ar laser is performed in the irradiating condition the same with the condition mentioned above. As a result, Si converted into amorphous silicon is molten, liquid phase epitaxial growth is generated, and at the same time, bridging epitaxy is generated, and the polycrystalline Si films on the SiO2 films are converted completely into the single crystal films.

Description

【発明の詳細な説明】 本発明は、ｒｌを結晶Ｊλ板表面とその一部に設はられ
た絶縁膜の所定の領域をＪ！Ｉ！続して覆う？ト結晶薄
膜の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for converting rl into J! I! Should I cover it next? The present invention relates to a method for producing a crystalline thin film.

ｒｌｔ結晶薄膜は、一般に、高温度の単結晶基板１゜に
気相化学反応などによって所望物質を輸送し、数分から
数十分の時間内で、通常は数μｍ程度の厚さに結晶成長
を行なうことによって形成される。Generally, RLT crystal thin films are produced by transporting the desired substance to a high-temperature single-crystal substrate at 1° by vapor-phase chemical reaction, and growing the crystal to a thickness of several micrometers within a few minutes to several tens of minutes. It is formed by doing.

また、１０−１０〜１０−＋ｔ　Ｔｏｒｒ程度の高置空
中でｉｌを結晶騙板表面へ所望物質を蒸着した後、基板
を加熱して結晶成長を行ない、Ｑｉ結晶薄膜を形成する
ことも行なわれている。It has also been done to deposit a desired substance onto the surface of a crystal plate using IL in the air at a high altitude of about 10-10 to 10-+t Torr, and then heat the substrate to grow crystals to form a Qi crystal thin film. ing.

これらの方法。は、いずれも単結晶基板、−Ｈに、小結
晶薄膜を形成すべき物質を輸送してエピタキシャル成長
を行なうものであるから、単結晶基板表面を用いること
が不可欠であり、絶縁膜など非晶質物質上に単結晶膜を
形成することは不可能であ−）た。しかし、最近におけ
る各種゛１へ導体装置の片るしい発展に伴なって、絶縁
膜など非晶質物質−１−にも小結晶薄膜を形成すること
が強く望まねるようになり、そのための研究が行なわれ
るようになった０ 例えば、基板上に被着された５１０２膜に凹部を形成し
た後、非晶質シリコンを全面に被着し、レーザを照射す
る方法が提案されている。この上′）にすると、まず、
」二記門部内に被着さねている非晶質シリコンがｒｌを
結晶化し、ついで、他の部分σ）非晶質シリコンも次第
に単結晶化すると言ゎゎている。These methods. In both of these methods, epitaxial growth is performed by transporting a substance to form a small crystal thin film onto a single crystal substrate, -H, so it is essential to use the surface of a single crystal substrate. It was impossible to form a single crystal film on the material. However, with the recent rapid development of various types of conductor devices, there has been a strong desire to form small crystal thin films even on amorphous materials such as insulating films. For example, a method has been proposed in which a concave portion is formed in a 5102 film deposited on a substrate, and then amorphous silicon is deposited on the entire surface and laser is irradiated. If we do this above′), first,
It is said that the amorphous silicon deposited in the second part crystallizes RL, and then the amorphous silicon in the other parts σ) gradually becomes single crystal.

しかし、この方法は、上記溝の形成など、各１゜程の１
１：、確な制御が困鑓であるばかりでなく、得Ｃ２ねる
ｌｉｔ結晶膜の特性も疑問であるなど、各種゛トＪ８体
装置ｒ１の製造に利用されるには至っていない。However, this method does not require the formation of the above-mentioned grooves, etc.
1: Not only is it difficult to control accurately, but the characteristics of the LIT crystal film that provides C2 gain are also questionable, so it has not been used in the production of various J8 body devices r1.

−，７Ｊ　ｚ他の方法として、シリコン基板−トの所定
の領域に絶縁膜を被着した後、半導体基板の露出０れた
表面の少なくとも一部と上記絶縁膜の所定σ〕領領域連
続して覆うように多結晶シリコン膜を肢ｊ’ｆＬ、しか
る後レーザを照射する方法が特願昭５４−１５’００８
０号に記載されている。この方法は、？１１結品基板１
−の被着膜を液２相、工偉タキシの機構ζ１丁よ−）で
単結晶化し、この領域を種として絶縁膜１に中、結晶領
域を延長しようとする方法で、ブリ。-,7J zAnother method is to deposit an insulating film on a predetermined region of a silicon substrate, and then connect at least a part of the exposed surface of the semiconductor substrate to a predetermined region of the insulating film. A method of applying a polycrystalline silicon film so as to cover the film and then irradiating it with a laser was disclosed in Japanese Patent Application No. 54-15'008.
It is stated in No. 0. This method? 11 final product board 1
- The deposited film is single-crystalized using a liquid two-phase mechanism (Z1), and this region is used as a seed to extend the crystalline region into the insulating film 1.

ジングーエピタキシと呼ばれる。It is called Jingu epitaxy.

この方法では、レーザ照射により単結晶シリコンＬの多
結晶シリコンを融解すると同時に、絶縁膜■−の多結晶
シリコンも融解する必要がある。この融解に必要なレー
ザの照射エネルギは、連続発振Ａｒレーザの場合、シリ
コン」−の多結晶シリコンに対して約５Ｗ１ＳＩ０２−
にの多結晶シリコンに対して約３Ｗであり、２Ｗの差が
ある。この差は、ＳｉＯ□の熱伝導率が８１のそれに較
べて約１相手さいため、５ＩＯ２からの熱伝導にする冷
却効果が小さいことに起因している。　　　　　′ 一方、５ｉｎ２１−の多結晶シリコンが融点以」二に加
熱される場合、加熱温度が」―昇するにしたがい、融解
した多結晶シリコンは物質輸送を起すようになる。この
物質輸送を起す照射エネルギの下限はＡｒレーザの一般
的照射条件（ビーム径５０μｍ。In this method, it is necessary to melt the polycrystalline silicon of the single crystal silicon L by laser irradiation, and at the same time melt the polycrystalline silicon of the insulating film 1-. In the case of continuous wave Ar laser, the laser irradiation energy required for this melting is approximately 5W1SI02- for polycrystalline silicon of silicon.
This is about 3W compared to polycrystalline silicon, which is a difference of 2W. This difference is due to the fact that the thermal conductivity of SiO□ is about 1 lower than that of 81, and therefore the cooling effect of heat conduction from 5IO2 is small. On the other hand, when 5in21 polycrystalline silicon is heated above its melting point, as the heating temperature increases, the molten polycrystalline silicon begins to undergo mass transport. The lower limit of the irradiation energy that causes this mass transport is the general irradiation condition of Ar laser (beam diameter 50 μm).

走査速度２０ｃｍ／Ｓ）に対して約、５５Ｗであり、こ
れ以」二の照射に対し□そは均一な中結晶領域をＳｉｎ
。It is approximately 55 W for a scanning speed of 20 cm/s), and after that, for the second irradiation, the uniform medium crystal region is
.

膜−にで得ることは困難になる。このことは、ブリッジ
ング・エピタキシを実現するレーザ照射の条件に強い制
限を与えている。すなわち、Ａｒレーザの照射では、一
般的にいって、５Ｗ〜５．５　Ｗでノ兎ネルギ範囲のみ
が良好なブリッジング　エピタキシをりえる条件となっ
ている。It becomes difficult to obtain a film. This places strong restrictions on the laser irradiation conditions for achieving bridging epitaxy. That is, in the case of Ar laser irradiation, generally speaking, only an energy range of 5 W to 5.5 W is sufficient to achieve good bridging epitaxy.

本発明の「Ｉ的は、ｌ？ｉ７述した異なる下地（例えば
Ｓ＋と５ｉ０２）　　１１−の堆積膜を融解するのに必
要な照射エネルギの大きさを近づけ、良好なブリッジン
グ・エピタキシをり、えるエネルギ範囲を拡げることを
可能にするｍ結晶薄膜の製造方法を提供することである
。The main purpose of the present invention is to approximate the amount of irradiation energy required to melt the deposited films of the different bases (e.g. S+ and 5i02) mentioned above, and to obtain good bridging epitaxy. An object of the present invention is to provide a method for manufacturing an m-crystalline thin film that makes it possible to expand the energy range that can be obtained.

［−記［１的を達成するために、本発明によるｒＦ結品
簿膜の製造方法は、＋１ｉ結晶シリコン基板表面の所定
の領域に絶縁膜を被着し、上記絶縁膜の少ｔｒくとも一
部および］−記弔結晶シリコン基板の少なくとも一部を
連続して覆うように多結晶シリコン膜を被着し、に記シ
リコン基板上に被着されている多結晶シリコン膜を完全
に非晶質化するようにイオン打込みを行なう工程と、」
―泥波着膜の一部にレーザまたは電ｒ・線照射を行ない
、被照射部の非晶質シリコン膜を唱結晶化し、上記哨結
晶シリコン基板表面とｌ記絶縁膜の所定の領域を連続し
て覆うようにシリコン弔結晶薄膜を形成する［：程とを
音むことを要旨とする。[-Note [In order to achieve the first objective, the method for manufacturing an rF crystalline film according to the present invention includes depositing an insulating film on a predetermined region of the surface of a +1i crystal silicon substrate, A polycrystalline silicon film is deposited so as to continuously cover at least a portion of the crystalline silicon substrate, and the polycrystalline silicon film deposited on the silicon substrate is completely amorphous. The process of ion implantation to improve quality,
- Laser or electric r/ray irradiation is applied to a part of the mud wave deposited film to crystallize the amorphous silicon film in the irradiated area, and the predetermined area of the above-mentioned crystalline silicon substrate surface and the above insulating film are made continuous. A silicon crystal thin film is formed to cover the process.

すなわち、本発明は、ンリ：Ｊンが非晶質化した場合、
原子間の結合が切れるため融点が約３０００に低下する
（　Ｐｒｏｃ、　Ｌａ５ｅｒ−８ａｌｉｄ　Ｉｎｔｅｒ
ａｃｔｉｏｎｓａｎｄ　Ｌａ５ｅｒ　Ｐｒｏｃｅｓｓｉ
ｎｇ　　（Ａｍｅｒｉｃａｎ　Ｉｎ５ｔｉｔｕｔｅｏｒ
　Ｐｈｙｓｉｃｓ　）　Ｈｏ５ｔｏｎ、１９７８．　ｐ
、　８１．　ｂｙ　Ｆ、　５ｐａｅｐｃｎ　）という小
吏を利用するものである。したがって、シリコン」−の
多結晶シリコンのみを、例えばイオン打込みにより非晶
質化すれは、この領域のシリコンの融点が低ドし、融解
に必要なレーザ照射のエネルギも下げることができる。That is, the present invention provides that when Nri:Jn becomes amorphous,
The melting point decreases to about 3000 because the bonds between atoms are broken (Proc, La5er-8alid Inter
actionsandLa5erProcessi
ng (American In5 position)
Physics) Ho5ton, 1978. p
, 81. By F, 5paepcn). Therefore, if only the polycrystalline silicon of silicon is made amorphous by, for example, ion implantation, the melting point of silicon in this region will be lowered, and the energy of laser irradiation required for melting can also be lowered.

これにより、シリコン」二の被着膜と５ｉ０２１の被着
膜を融解するのに必要なレーザ・エネルギの大きさを近
づけ、は（等しくすることが可能となり、レーザ照射の
条件を拡げることができる。このことは、絶縁膜」二に
より容易に単結晶シリコンを成長させることができるだ
けでなく、より大面積の弔結晶シリコンを得ることも期
待させる。This makes it possible to bring the laser energy required to melt the deposited film of silicon 2 and the deposited film of 5i021 closer to each other, making it possible to make them equal, and the conditions for laser irradiation can be expanded. This makes it possible not only to easily grow single-crystal silicon using the insulating film, but also to obtain a larger area of crystalline silicon.

以下に附図を参照しながら、実施例を用いて本発明を一
層詳しく説明するが、それらは例示に過きす、本発明の
枠を越えることなしにい７）いろｔＣ変形や改良があり
得ることは勿論である。The present invention will be explained in more detail using examples with reference to the accompanying drawings, but these are merely illustrative and there may be various modifications and improvements without going beyond the scope of the present invention. Of course.

第１図に示すように、Ｓｉ基板１の（１０，０）而Ｉ・
に幅４膜ｍ、膜厚５５０ｍの熱酸化膜２を通常のホ１リ
ソグラフィ技術によって２μｍの間隔で形＋ｌｉ　ｌ−
。As shown in FIG. 1, (10,0) of the Si substrate 1 is
A thermal oxide film 2 with a width of 4 m and a film thickness of 550 m is formed at intervals of 2 μm using normal lithography technology.
.

た。Ta.

つぎに公知のＣＶＤ技術を用いて、膜厚３５０ｎｍの多
結晶Ｓｉ膜５を全面に被着した。この試料の１部から、
連続発振Ａｒレーザを３．５　Ｗのエネルギで２０　（
ＷＬ／　ｓの速度で走査しながら照射した。その結果、
熱酸化膜２Ｉ―の多結晶Ｓｉ膜は融解し、グレイン　サ
イズが拡大したが、ＳＩ上の多結晶Ｓ１膜は融解せず、
ブリッジング・エピタキシは生じなかった。Next, a polycrystalline Si film 5 with a thickness of 350 nm was deposited on the entire surface using a known CVD technique. From one part of this sample,
A continuous wave Ar laser was used at an energy of 3.5 W for 20 (
Irradiation was performed while scanning at a speed of WL/s. the result,
The polycrystalline Si film of thermal oxide film 2I melted and the grain size expanded, but the polycrystalline S1 film on SI did not melt.
No bridging epitaxy occurred.

つぎに、第２図に示すように、適当なマスクパターン５
を用いて単結晶ＳＩ基板、１１の］―に堆積（７ている
多結晶Ｓ１４の領域のみに８１＋イオン打込み４行なっ
た。イオン打込みは３５０　ｎｍの多結晶Ｓ　ｉ　１１
／、’＋が完全に非晶質化するような条件、すなｔ）も
、（１込みエネルギ２００ｋｅｙ、打込み］１動２×１
０１６ＳＩ＋／／ｃｍ２の条件で行なった。矢印６はこ
のＳ計イオン打込みを模式的に表わす。Next, as shown in FIG. 2, a suitable mask pattern 5 is formed.
Four 81+ ion implantations were performed only in the region of polycrystalline S14 deposited (7) on a single-crystalline SI substrate, 11].
The conditions under which /, '+ become completely amorphous, i.e.
The test was carried out under the conditions of 016SI+//cm2. Arrow 6 schematically represents this S meter ion implantation.

この打込み条件でシリコン１−の多結晶Ｓ１はＳｉとの
界面を越えて非晶質化することがラザフォード後方散乱
の測定で確かめられた。このような試料に前記照射条件
と同一の条件で連続発振Ａｒのレーザ照射を行なった。It was confirmed by Rutherford backscattering measurements that under these implantation conditions, polycrystalline S1 of silicon 1- becomes amorphous beyond the interface with Si. Continuous wave Ar laser irradiation was performed on such a sample under the same conditions as the irradiation conditions described above.

この結果、３５Ｗのエネルギの照射で、非晶質化したＳ
ｉは融解し、液相エピタキシャル成長すると同時に、ブ
リッジング・エピタキシが生じ、５１０２膜上の多結晶
ＳＩは完全に単結晶化した。このレーザ照射は、エネル
ギ範囲を３Ｗ〜５．５　Ｗの間で変化させても良好なブ
リッジング・エピタキシをり、える条件であることが分
った。As a result, S
i was melted and liquid phase epitaxial growth occurred, at the same time bridging epitaxy occurred, and the polycrystalline SI on the 5102 film became completely single crystallized. It has been found that this laser irradiation is a condition that allows good bridging epitaxy even when the energy range is varied between 3W and 5.5W.

ブリッジング・エピタキシは、レーザの′ビーム１′（ 径、走査速度、などに１′・よっても影響を受け１．ｌ
−記エネルギ範囲は、主としてビーム径５０′７ｚｍ、
走査速度２０ｃ１Ｓの条件のもとで成立つものである。Bridging epitaxy is also affected by the laser beam 1 (diameter, scanning speed, etc.).
- The above energy range mainly includes a beam diameter of 50'7zm,
This is true under the condition that the scanning speed is 20c1S.

したがって、ビーム径、走査速度を変化させれば、ブリ
ッジング・エピタキシが起るエネルギ範囲も変化し、１
５Ｗ迄のエネルギ照射でも良好な結１１！を得ることが
できた。Therefore, if the beam diameter and scanning speed are changed, the energy range in which bridging epitaxy occurs will also change.
Good results even with energy irradiation up to 5W 11! I was able to get

これら照射条件のもとて単結晶化し得る堆積Ｉｌｌ；・
の厚さは１μｍ程度迄は可能であり、膜厚に応１２てイ
オン打込み条件を変化させ、堆積膜の非晶質化をはかれ
７よ良い。非晶質化を行なうのに用いる十 イオンは、Ｓｌ　　イオンまたはＧｅ＋イオンが良く、
他のイオンを用いる場合は、レーザ・アニール後ドーピ
ング効果が起ったり、アニール領域にガス状のバブル領
域が残留して好ましい結末をりえ／〔かった。Deposits that can be made into single crystals under these irradiation conditions;・
The thickness of the deposited film can be up to about 1 μm, and the ion implantation conditions can be changed depending on the film thickness to make the deposited film amorphous. The ten ions used for amorphization are preferably Sl ions or Ge+ ions;
If other ions are used, doping effects may occur after the laser anneal or a gaseous bubble region may remain in the anneal region, leading to undesirable results.

本発明においては、レーザは多結晶もしくは一月晶質δ
ｌを融解できれば良いので、これらを融解できるレーザ
をすべて用い得ることは言うまでもｔＩい。また、ｊｌ
ｉ−パルスの照射でも、繰返しパル４の照射でも、レー
ザ照射条件を適当に選べば、良好な結果を得ることがで
きる。さらに、レーザーＣなくとも、堆積膜を融解でき
る電子ビーム、−で４ン・ビーム、大出力の光、などを
用いても良いことは、すう迄もない。In the present invention, the laser is polycrystalline or monocrystalline δ
It goes without saying that all lasers capable of melting these can be used since it is sufficient to be able to melt them. Also, jl
Whether it is i-pulse irradiation or repeated pulse 4 irradiation, good results can be obtained if the laser irradiation conditions are appropriately selected. Moreover, it is far from possible to use an electron beam capable of melting the deposited film, a negative 4 nm beam, high-output light, etc., even without the laser C.

」−記説明は、絶縁膜として５ｉｎ２膜を用いた場合に
ついて説明したが、本発明において、ソノ」二ニｔｉｔ
結晶ＳＩ膜が形成される絶縁膜がＳｉＯ□膜に限定され
るものでないことは言うまでもなく、５１３Ｎ４膜。''--The description is based on the case where a 5in2 film is used as the insulating film, but in the present invention,
Needless to say, the insulating film on which the crystalline SI film is formed is not limited to the SiO□ film, and is, of course, the 513N4 film.

Ａｌ２Ｏ３膜、燐ガラス膜など、半導体装置において一
般に用いられる各種絶縁膜を広く用いることがｉｉ丁能
である。It is best to use a wide variety of insulating films commonly used in semiconductor devices, such as Al2O3 films and phosphorous glass films.

また、絶縁膜は第１図および第２図では、ＳＩ基も °板１の表面に堆積されているが、Ｓ＋基板の」二部に
形成された構造としても、本発明は同様に適用できる。Furthermore, although the insulating film and the SI group are deposited on the surface of the substrate 1 in FIGS. .

以上説明した通り、本発明によれば、非常に多様な照射
条件でブリッジング・エピタキシを行なうことができる
という利点が得られる。As explained above, the present invention has the advantage that bridging epitaxy can be performed under a wide variety of irradiation conditions.

【図面の簡単な説明】[Brief explanation of drawings]

第１および第２図は本発明による単結晶薄膜の製造方法
の工程を表わす断面図である。 １・・・Ｓｉ基板、２・・・絶縁膜、３・・・多結晶Ｓ
ｉ膜、４・・・非晶質Ｓｉ膜、５・・・マスク、６・・
・Ｓ１＋イオン打込みを模式的に表わす矢印。 代理人弁理士　中　村　鈍才 ・、）。 才１　図 を２図1 and 2 are cross-sectional views showing the steps of the method for manufacturing a single crystal thin film according to the present invention. 1... Si substrate, 2... Insulating film, 3... Polycrystalline S
i film, 4... amorphous Si film, 5... mask, 6...
-Arrow schematically representing S1+ ion implantation. Representative Patent Attorney Nakamura Nakamura.). Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] ｔｉｔ結晶シリコンＪＡ板表面の所定の領域に絶縁膜を
被着し、上記絶縁膜の少なくとも一部および１−泥中結
晶シリコン基板の少なくとも一部を連続して覆うように
多結晶シリコン膜を被着し、」１記シリコン基板Ｉ−に
被着されている多結晶シリコン膜を完全に非晶質化する
ようにイオン打込みを行な一′１１’、程と、１゛記被
膜の一部にレーザまたは電ｒ・線照射を行ない、被照射
部の非晶質シリコン膜を？ｌｔ結品化し、上記Ｑｔ結晶
シリコン基板表面と１記絶縁膜の所定の領域を連続して
覆うようにシリコンｉｉｔ結晶薄膜を形成する１：程と
を含むことを特徴とするＦｌｕ結晶薄膜の製造方法。An insulating film is deposited on a predetermined region of the surface of the tit crystal silicon JA board, and a polycrystalline silicon film is applied so as to continuously cover at least a portion of the insulating film and at least a portion of the submerged crystal silicon substrate. Then, ion implantation was performed to completely amorphize the polycrystalline silicon film deposited on the silicon substrate I-1. Laser or electric r/ray irradiation is applied to the amorphous silicon film in the irradiated area. Manufacturing a Flu crystal thin film characterized by comprising steps 1: forming a silicon IIT crystal thin film so as to continuously cover the surface of the Qt crystal silicon substrate and a predetermined region of the insulating film. Method.
JP57094439A 1982-06-02 1982-06-02 Manufacture of single crystal thin film Pending JPS58212123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57094439A JPS58212123A (en) 1982-06-02 1982-06-02 Manufacture of single crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57094439A JPS58212123A (en) 1982-06-02 1982-06-02 Manufacture of single crystal thin film

Publications (1)

Publication Number Publication Date
JPS58212123A true JPS58212123A (en) 1983-12-09

Family

ID=14110283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57094439A Pending JPS58212123A (en) 1982-06-02 1982-06-02 Manufacture of single crystal thin film

Country Status (1)

Country Link
JP (1) JPS58212123A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6167218A (en) * 1984-09-07 1986-04-07 Fujitsu Ltd Manufacture of semiconductor device
JPS61201414A (en) * 1985-03-02 1986-09-06 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPS6356912A (en) * 1986-08-27 1988-03-11 Seiko Instr & Electronics Ltd Manufacture of recrystallized semiconductor thin-film
JPS6360519A (en) * 1986-08-30 1988-03-16 Sony Corp Annealing method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6167218A (en) * 1984-09-07 1986-04-07 Fujitsu Ltd Manufacture of semiconductor device
JPS61201414A (en) * 1985-03-02 1986-09-06 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPH0334847B2 (en) * 1985-03-02 1991-05-24 Kogyo Gijutsuin
JPS6356912A (en) * 1986-08-27 1988-03-11 Seiko Instr & Electronics Ltd Manufacture of recrystallized semiconductor thin-film
JPS6360519A (en) * 1986-08-30 1988-03-16 Sony Corp Annealing method

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