JPS58209233A - Time display system - Google Patents

Time display system

Info

Publication number
JPS58209233A
JPS58209233A JP57091224A JP9122482A JPS58209233A JP S58209233 A JPS58209233 A JP S58209233A JP 57091224 A JP57091224 A JP 57091224A JP 9122482 A JP9122482 A JP 9122482A JP S58209233 A JPS58209233 A JP S58209233A
Authority
JP
Japan
Prior art keywords
time
time information
information
receiver
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57091224A
Other languages
Japanese (ja)
Inventor
Masafumi Nakamura
雅文 中村
Nobutaka Amada
信孝 尼田
Harushige Nakagaki
中垣 春重
Shigeki Inoue
茂樹 井上
Yoshimi Iso
佳実 磯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57091224A priority Critical patent/JPS58209233A/en
Publication of JPS58209233A publication Critical patent/JPS58209233A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86Arrangements characterised by the broadcast information itself
    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means
    • G04G9/0005Transmission of control signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/28Arrangements for simultaneous broadcast of plural pieces of information
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/09Arrangements for device control with a direct linkage to broadcast information or to broadcast space-time; Arrangements for control of broadcast-related services
    • H04H60/13Arrangements for device control affected by the broadcast information

Abstract

PURPOSE:To display time on a time display incorporated into a receiver, by detecting and separating time information transmitted in multiplexing with main information by a decoder. CONSTITUTION:In PCM broadcast, for example, an analog signal is converted into a digital signal at an A/D converter 6 at the trasmission side, a standard time generator 7 generates the time information, the main information and the time information of an output of the A/D converter 6 are coded by an encoder 8, the modulation is done by a modulator 9 and the coded information is transmitted to a transmission line via an antenna 23. The information through a transmit ter is demodulated by a demodulator 10 via an antenna 24 at the receiving side, and separated into the main information and the time information at a composite separator 11. The main information is converted into an analog signal by a D/A converter 12 and outputted to a terminal 30. The time is displayed from the time information on the display 13.

Description

【発明の詳細な説明】 本発明は多重放送受信機に系シ、特に時刻情報が多重さ
れた信号を受信する受1機において時刻を表示−「る、
時刻表示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for displaying time in a multiplex broadcasting receiver, particularly in a single receiver that receives a signal on which time information is multiplexed.
This invention relates to a time display device.

受信機に、時刻表示装置iを組み込んで、時刻を表示す
る方法としては、受信機内部において、第1図に示すよ
うに、水晶発*器1、分局器2゜カウンター3、デコー
ダ4、表示器5によって、水晶発m器1の発振周波数を
分周し、カウントして時刻を表示している。この方法に
よシ時刻を表示すると、受信をしていても、いなくても
In order to display the time by incorporating a time display device i into a receiver, as shown in Fig. The oscillation frequency of the crystal oscillator 1 is divided by the oscillation frequency of the crystal oscillator 1, and the time is displayed by counting. If you display the time using this method, you can watch it even if you are not listening.

内部水晶発振器によって時刻が決まるので、水晶発振器
の発振周波数の設定値との誤差によシ。
Since the time is determined by an internal crystal oscillator, there may be an error with the oscillation frequency setting of the crystal oscillator.

表示時刻に誤差が出てくる。時刻に誤差がでてきた場合
、カウンターの値を、正しい時刻に、セットをし直さね
ばならないという問題がある。
There will be an error in the displayed time. If an error occurs in the time, there is a problem in that the counter value must be reset to the correct time.

本発明は時刻情報を多重して送信し、受信機でこの時刻
情報を表示するようにして従来の欠点をなくし、更には
自動的に表示時刻の補正を行う1時刻表示装置を提供す
ることにある。
The present invention aims to eliminate the drawbacks of the conventional technology by multiplexing and transmitting time information and displaying this time information on a receiver, and furthermore, to provide a single time display device that automatically corrects the displayed time. be.

本発明では、時刻情報が多重されて電波が送信されるこ
とを前提とし受信情報中に含まれている時間情報によっ
て受信機が時刻を表示し。
In the present invention, it is assumed that time information is multiplexed and radio waves are transmitted, and the receiver displays the time based on the time information included in the received information.

且つ受信終了後も、受信終了時に表示された時刻を基に
して現在時刻を表示するようになして自動的に時刻の補
正を行なうようにした。
Furthermore, even after the reception ends, the current time is displayed based on the time displayed at the end of the reception, and the time is automatically corrected.

第2図は本発明の一実施例である。第2図はpct(F
LLtzy cocLg modulation)放送
に本発明を適用した場合の例でらυ送信側において1.
ルノ変換器6によυアナログ信号をディジタル信号に変
換し、標準時間発生装漣7によシ1時刻情報を発生し、
A/’Df漠器6の出力の主1#報と時刻情報とを符号
化器8によシ符号化して、変調器9によシ変調を行って
アンプ、+23を介して送信路へ送出する。受茗側にお
いては、送信路を通って来た情報をアンテナ24を介し
てlx器10により復調し、1号分離器11により主情
報と時刻情報とに分離する。主情報はD/A変換器12
によシアナログ信号に変換され、端子50に出力される
。時刻情報は表示装置15により時刻の表示を行なう。
FIG. 2 shows an embodiment of the present invention. Figure 2 shows pct(F
LLtzy cocLg modulation) In an example where the present invention is applied to broadcasting, 1.
A converter 6 converts the υ analog signal into a digital signal, a standard time generator 7 generates time information,
The main 1# signal and time information output from the A/'Df vague device 6 are encoded by the encoder 8, modulated by the modulator 9, and sent to the transmission path via the amplifier and +23. do. On the receiver side, the information that has passed through the transmission path is demodulated by the LX unit 10 via the antenna 24, and separated into main information and time information by the No. 1 separator 11. Main information is D/A converter 12
The signal is converted into a digital analog signal and output to the terminal 50. The time information is displayed on the display device 15.

第3図は本発明の他の実1也向であシ、送信機側を省略
し、受信機側のみ示す。本例は受信機に時計装置27を
持ち、受gI遣の主電源スイッチ16をオフした場合て
も時刻表示を行なえるようにしたものである。時計装#
127および表示装置13は第3図中に示し−〔ないが
電池を用いること等によって、主電源スイッチ16がオ
フされていても動作するものとする。したがって主電源
スイッチ16が(α)の側に接続されて100のライン
電圧から電力が供給されているとき、切換装置25を(
α)側に接続しておくと、送信逼れてきた時刻情報を表
示でき、主電源スイッチ16が(b) till Ic
接続され、オフとされた場合であっても切換装置25を
tbl側に接続することによって、時計装置27で刻ま
れる時刻が表示H1It15で表示できる。本例におい
て主電源スイッチ16と切換装置25とを連動して動く
ようにしておけば、主電源スイッチ16がオンの場合に
は送信されてきた時刻情報を、主電源スイッチがオフの
場合にVi時計装置27で刻まれた時刻の表示に切り換
えることもできる。
FIG. 3 shows another aspect of the present invention; the transmitter side is omitted and only the receiver side is shown. In this example, the receiver has a clock device 27 so that the time can be displayed even when the main power switch 16 of the receiver is turned off. Watch #
127 and the display device 13 are not shown in FIG. 3, but are assumed to operate even when the main power switch 16 is turned off by using a battery or the like. Therefore, when the main power switch 16 is connected to the (α) side and power is supplied from the line voltage of 100, the switching device 25 is connected to the (α) side.
If connected to the α) side, the time information that has been transmitted can be displayed, and the main power switch 16 will be connected to the (b) till Ic
Even if it is connected and turned off, by connecting the switching device 25 to the tbl side, the time marked by the clock device 27 can be displayed on the display H1It15. In this example, if the main power switch 16 and the switching device 25 are made to operate in conjunction with each other, when the main power switch 16 is on, the transmitted time information is transmitted, and when the main power switch 16 is off, the transmitted time information is It is also possible to switch to displaying the time marked by the clock device 27.

第4図は本発明の他の実施例を示す図でめシ、第3図に
示す時計装置27をマイクロコンピュータで実現した場
合の例であシ、時計装置270周辺だけを示し、他の部
分は省略しである。第4図における切換装置t17ri
第5図の切換装置i25に代わるもので、この切換装置
117は第5図の主電源スイッチ16と連動して動作さ
れるものとする。
FIG. 4 is a diagram showing another embodiment of the present invention, and is an example in which the clock device 27 shown in FIG. 3 is realized by a microcomputer. is omitted. Switching device t17ri in Fig. 4
This switching device 117 replaces the switching device i25 of FIG. 5, and is operated in conjunction with the main power switch 16 of FIG.

すなわち主電源スイッチ16が(α)側に接続されると
きは切換装置17も(α)側に接続場れ、主電源スイッ
チ16が(b)側のときは切換装置17もt&j側に接
続されるものとする。以下第5図のフローチャートを用
いて詳細に動作を説明する。主電源スイッチ16が(α
)側に接続でれているとき、すなわち切換装置1i17
が(α)側に接続嘔れている場合、マイクロコンピュー
タで構成される時計装[(以後説明上マイクロコンピー
タと記す)27r!、切換装置t17 (以下y′と記
す)が「ハイレベル」か「ローノベル」かの判定をステ
ップ■で行なう。
That is, when the main power switch 16 is connected to the (α) side, the switching device 17 is also connected to the (α) side, and when the main power switch 16 is connected to the (b) side, the switching device 17 is also connected to the t&j side. shall be The operation will be explained in detail below using the flowchart shown in FIG. The main power switch 16 is (α
) side, that is, when the switching device 1i17
is connected to the (α) side, the clock unit consisting of a microcomputer [(hereinafter referred to as microcomputer for the sake of explanation) 27r! , the switching device t17 (hereinafter referred to as y') determines whether it is "high level" or "low novel" in step (2).

5Fがハイレベルの場合復号分離器11の時刻情報υ出
力バッファ18から■のステップでマイクロコンピータ
27の配意装置JIIj9(以後メモリと記″t)に移
される。この時、H,hは時、M 、mは分、S、zは
秒、X、xけイ。秒を示すものとする。
When 5F is high level, the time information υ output buffer 18 of the decoding separator 11 is transferred to the arrangement device JIIj9 (hereinafter referred to as memory and "t") of the microcomputer 27 in step (2). At this time, H and h are the time information υ , M and m are minutes, S and z are seconds, and X and x are seconds.

この後ステップ■でメモリ19のfl、、M、Sが、出
力バッファ21に移されステップ■で出力バッファ21
の内容が、表示装置15に表示され、再び、yのハイレ
ベルかローレベルかの判定を行ない上記動作を繰シ返す
。ステップ■でJがローレベルの場合、マイクロコンピ
ュータ2フの中の演算装置20によシ、ステップ■で内
部クロック発生器22のクロックパルスをカウントし/
+0秒に相当する数をカウントしたらステップ■でメモ
リ19のXに1を加える。ステップ■でX<10ならば
、再びyのハイレベルかローレベルかを判定し、ステッ
プ■でX−10ならば1秒経過したことになる。ので、
ステップ■でSに1を加え、Xを0にセラ)4る。次に
ステップ0でS<60fxらばステップ■)にゆきメモ
リ19の内容を表示バッファ21に移しステップ■で表
示装置13に表示を行なう。ステップ[相]で5−60
ならば、1分間経過したことになるので、ステップ◎で
Mに1を加え、SをOにセラトスる。次に、ステップ@
でM<60ならば、ステップ■にゆきメモリ19の内容
を表示バッフ721に移しステップCて表示装置15に
表示を行なう。ステップ@でM−60ならば1時間経過
したことになるのでステップ[相]でHに1を肌え1M
を0にする。ステップ@ではH<24のときステップ■
にゆきステップ■を経て表示装置16に時刻が表示され
るステップ@でB=24のときにはステップ[相]でB
をOにセットし、同様に表示を行なう。
After this, in step 2, fl, , M, and S in the memory 19 are transferred to the output buffer 21, and in step 2, the output buffer 21 is transferred to the output buffer 21.
The contents of y are displayed on the display device 15, and it is again determined whether y is at high level or low level, and the above operation is repeated. When J is at a low level in step (2), the arithmetic unit 20 in the microcomputer 2 counts clock pulses of the internal clock generator 22 in step (2).
After counting the number corresponding to +0 seconds, add 1 to X in the memory 19 in step ①. If X<10 in step (2), it is determined again whether y is at a high level or low level, and if X-10 in step (2), one second has elapsed. So,
In step ■, add 1 to S and set X to 0. Next, if S<60fx in step 0, the process goes to step (2), the contents of the memory 19 are transferred to the display buffer 21, and the contents are displayed on the display device 13 in step (2). 5-60 in step [phase]
In that case, one minute has passed, so in step ◎, add 1 to M and ceratos S to O. Next, step @
If M<60, the process proceeds to step (2), where the contents of the memory 19 are transferred to the display buffer 721, and the contents of the memory 19 are transferred to the display buffer 721, and are displayed on the display device 15 at step C. If it is M-60 in step @, it means that 1 hour has passed, so set 1 to H in step [phase] to 1M.
Set to 0. In step @, when H<24, step ■
When B=24 at step @ where the time is displayed on the display device 16 after step ■, B is displayed at step [phase].
Set to O and display in the same way.

以上のような動作を行うと受信機が放送電波を受信して
いない間でもマイクロコンビーータ27は内部クロック
発生器22で時刻を刻むばかジでなく、表示時刻に誤差
を生じたとしても、受信機の主電源スイッチ16がオン
された場合には切換装[17も同期して「ハイレベル」
となるためメモリ19の内容は送信されてくる時刻情報
に書き換えられ、自動的に時刻の設定及び補正が行なわ
れることとなる。また圧電源スイッチ16がオフとされ
た場合であっても、それまで受信していた時刻情報をベ
ースにして内部クロック発生器22のクロックを基準と
して時計動作を続ける。
By performing the above operation, the microconbeater 27 does not keep time using the internal clock generator 22 even when the receiver is not receiving broadcast waves, and even if an error occurs in the displayed time, When the main power switch 16 of the receiver is turned on, the switching device [17 is also synchronously set to "high level".
Therefore, the contents of the memory 19 are rewritten with the transmitted time information, and the time is automatically set and corrected. Further, even if the piezoelectric power switch 16 is turned off, the clock operation continues based on the clock of the internal clock generator 22 based on the time information received up to that point.

本発明の実施例ではPCM放送に時刻情報をディジタル
的に多重した場合を用いて説明したが、PCM放送に限
られず、従来の放送でも時刻情報を周波数領域で多重す
る方法であっても良いことは明らかである。
Although the embodiments of the present invention have been described using a case in which time information is digitally multiplexed in PCM broadcasting, it is not limited to PCM broadcasting, and a method of multiplexing time information in the frequency domain may also be used in conventional broadcasting. is clear.

本発明によれば、放送局から正しい時刻情報が送られて
くるので、家庭に於ける時刻も正しく表示できるばかシ
でなく、受信機表示時刻を自動的に設定及び補正できる
ので、従来のように、表示時刻に誤差が出てきた時に、
表示時刻の設定をし直す必要もなくなる利点がある。
According to the present invention, since the correct time information is sent from the broadcasting station, the time at home can also be displayed correctly, and the time displayed on the receiver can be automatically set and corrected, making it possible to automatically set and correct the time displayed on the receiver. When an error appears in the displayed time,
This has the advantage of eliminating the need to reset the display time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の時刻表示装置を示す図、第2図は本発明
の時刻表示システムの例を示す図、第5図は本発明の他
の実施例を示す図、第4図は本発明をマイクロコンビー
ータを用いて実現した実施例を示す図、第5図は第4図
の実施例のマイクロコンピュータのフローチャートを示
す図である。 1:水晶発振器、   2:分周器、 3:カウンター、  4:デコーダ。 5:表示器、     6 : −41D変換器、7:
標準時間発生装置、 8、符号化器、   9:変調器、 10:復調器、    11:復号分離器。 12: D/A変換器、  15:表示装置、16:主
電源スイッチ、17:切換装置。 18:出力バッファ、19:メモ11.20;演算器、
    21.出力)くツファ。 22、内部りdツク発生器、 2ろ:アンテナ、   24:アンテナ。 25:切裸装置、   27:時計装置。 代理人弁理士 薄 1)利 幸
FIG. 1 is a diagram showing a conventional time display device, FIG. 2 is a diagram showing an example of a time display system according to the present invention, FIG. 5 is a diagram showing another embodiment of the present invention, and FIG. 4 is a diagram showing an example of the present invention. FIG. 5 is a flowchart of the microcomputer of the embodiment shown in FIG. 4. 1: Crystal oscillator, 2: Frequency divider, 3: Counter, 4: Decoder. 5: Display, 6: -41D converter, 7:
Standard time generator, 8, encoder, 9: modulator, 10: demodulator, 11: decoding separator. 12: D/A converter, 15: display device, 16: main power switch, 17: switching device. 18: Output buffer, 19: Memo 11.20; Arithmetic unit,
21. Output) Kutufa. 22, internal ripple generator, 2ro: antenna, 24: antenna. 25: Dissection device, 27: Clock device. Representative Patent Attorney Susuki 1) Yuki Toshi

Claims (1)

【特許請求の範囲】 1、 主情報に時刻情報を多重して送信する送信機、該
送信機よシの送信信号を受信し、該時刻情報を検出、分
離する復号器及び該時刻情報を表示する表示装置を具備
する受信機よシなる時刻表示システム。 2、 時刻情報を含む送信信号を受信し、該時刻情報を
検出、分離する復号器、該時刻情報を表示する表示装置
を備えた受信機において。 該受信機の電源スィッチと連動して動作する切換装置及
び該受信機の電源スィッチがオフ時でも動作する時計装
置を具備し、該受信機の電源スィッチがオンの時は該受
信した時刻を、該電源スィッチがオフの時は該時計装置
の時刻を表示するようになしたことを特徴とする時刻表
示システム。 5、 時刻情報を含む送信信号を受信する受信機におい
て、該時刻情報を検出10分離する復号器、該時刻情報
な表示するために一時記憶する記憶装置、該記憶装置か
ら該時刻情報を続出して表示する表示装置、該記憶装置
の時刻情報部分を共用し、該受信機が該送信信号の受信
を停止した時でも動作する時計装置及び切換装置を具備
し、該切換装置によシ該送信信号を受信中は該時刻情報
を表示し、受信を停止したときに(d、該受信を停止し
たときにおける該記1装置に記l意された時刻情報を基
に該時計装置が時刻を表示するようになし。 該受信機が送信信号を受信したときに自動的に正しい時
刻の設定が行なわれるようにしたことを特徴とする時刻
表示ンステム。
[Claims] 1. A transmitter that multiplexes time information with main information and transmits the same, a decoder that receives a transmission signal from the transmitter, detects and separates the time information, and displays the time information. A time display system similar to a receiver having a display device. 2. A receiver equipped with a decoder that receives a transmission signal including time information, detects and separates the time information, and a display device that displays the time information. A switching device that operates in conjunction with a power switch of the receiver and a clock device that operates even when the power switch of the receiver is off, and when the power switch of the receiver is on, the received time is A time display system characterized in that the time of the clock device is displayed when the power switch is off. 5. In a receiver that receives a transmission signal containing time information, a decoder that detects and separates the time information, a storage device that temporarily stores the time information for display, and a storage device that continuously outputs the time information from the storage device. A display device for displaying the time information, a clock device and a switching device that share the time information portion of the storage device and operate even when the receiver stops receiving the transmission signal, and a switching device that displays the transmission signal by the switching device. While receiving the signal, the time information is displayed, and when the reception is stopped (d) the clock device displays the time based on the time information recorded in the device 1 at the time the reception is stopped. A time display system characterized in that the correct time is automatically set when the receiver receives a transmission signal.
JP57091224A 1982-05-31 1982-05-31 Time display system Pending JPS58209233A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57091224A JPS58209233A (en) 1982-05-31 1982-05-31 Time display system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57091224A JPS58209233A (en) 1982-05-31 1982-05-31 Time display system

Publications (1)

Publication Number Publication Date
JPS58209233A true JPS58209233A (en) 1983-12-06

Family

ID=14020445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57091224A Pending JPS58209233A (en) 1982-05-31 1982-05-31 Time display system

Country Status (1)

Country Link
JP (1) JPS58209233A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62298790A (en) * 1986-06-19 1987-12-25 Sanyo Electric Co Ltd Timepiece display unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62298790A (en) * 1986-06-19 1987-12-25 Sanyo Electric Co Ltd Timepiece display unit

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