JPS58142651A - Multiplex information transmitter - Google Patents

Multiplex information transmitter

Info

Publication number
JPS58142651A
JPS58142651A JP2445282A JP2445282A JPS58142651A JP S58142651 A JPS58142651 A JP S58142651A JP 2445282 A JP2445282 A JP 2445282A JP 2445282 A JP2445282 A JP 2445282A JP S58142651 A JPS58142651 A JP S58142651A
Authority
JP
Japan
Prior art keywords
information
signals
signal
transmission
multiplex
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2445282A
Other languages
Japanese (ja)
Inventor
Kenichi Matsuda
健一 松田
Takao Sato
隆雄 佐藤
Setsuo Arita
節男 有田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP2445282A priority Critical patent/JPS58142651A/en
Publication of JPS58142651A publication Critical patent/JPS58142651A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G08SIGNALLING
    • G08CTRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C15/00Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path
    • G08C15/06Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path successively, i.e. using time division
    • G08C15/12Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path successively, i.e. using time division the signals being represented by pulse characteristics in transmission link

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To minimize the traffic volume of series multiplexing signals, by automatically transmitting signals being changed preferentially to the other signals among information inputted in parallel from plural information signal sources. CONSTITUTION:Signal sources 1(1A...1N) output signals 2(2A...2N) to transmitting circuits 3(3A...3N). The transmitting circuits 3 produce series information signals 4(4A...4N) having fixed lengths from the signals 2 and output them to a multiplex information transmitter 5. The multiplex information transmitter 5 always collates the transmitted signals 4(4A...4N) with information taken into the transmitter 5 at the previous time whether they coincide with each other or not, and transmits the signals 4 after they are converted into series information signals 6 having fixed lengths to a post device 7 in a fixed transmitting order when they coincide with each other, or preferentially to the other signals when they do not coincide with each other. The series information signal 6 consists of a synchronizing signal part, an address signal part, and an information signal part.

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は、独立または同時に変化する複数の並列情報を
直列多重化して遠方に伝送する情報伝送装置において、
変化する情報のトラヒック敏を最小化するようにして伝
送する情報伝送装置に関する。 プラント内で発生する多数の情報を、たとえば中央制御
室などに伝送する伝送装置においては、変化中の情報を
変化していない一定情報よりも優先的に伝送
The present invention provides an information transmission device that serially multiplexes a plurality of pieces of parallel information that change independently or simultaneously and transmits the serially multiplexed information to a long distance.
The present invention relates to an information transmission device that transmits changing information while minimizing traffic sensitivity. In transmission equipment that transmits a large amount of information generated within a plant to, for example, a central control room, changing information is transmitted with priority over constant information that is not changing.

【−、シス
テム全体の伝送容量ヲ斗価的に大きくすることが望まし
い。しかし、従来のプラント内情報伝送系においては、
変化生情報と一定情報とを同じ頻度で伝送したり、ある
いは逆に、変化生情報が存在する場合Hg情報のみを伝
送したりしていたため、全情報に対するトラヒック置を
最小化していることにはならなかった。 本発明の目的は、変化中の情報信号が存在するか否か全
常時監視し、変化生情報が存在しない時は全情報を一定
の順序と周期で、存在する時は変化生情報を優先的にか
つ全情報信号のトラヒック11ヲ最小化するようにして
、上位装置へ直列VC伝送するごとくした情報伝送装置
f全提供することにめる一 本発明は、複数の情報信号源から並列的に入力される情
報信号の、前回値と今回値とを遂次比較し、不一致が生
じたとき、すなわち情報が変化しているとき、該情報を
他の一定情報よりも優先的に、かつ変化中のものすべて
のトラヒック量が最小となるようなl1ljl序で、情
報信号を伝送するようにしたこころに特徴がある。 以上7本発明の実施例について図面を用いて詳細に説明
する。 第1図は本発明の一つの実施例である。同図において、
信号源1(IA、・・・、IN)は、信号2(2A、・
・・、2N>全伝送回路3(3A、・・・。 3N)に出力する。伝送回路3Vi、信号2より第2図
のような一定長の直列情報信号4(4A、・・・。 4N)ffi作成し、多重情報伝送装置5へ出力する。 多重・1H報伝送装置5は伝送されてきた各信号4(4
A、・・・、4N)が前回取り込んだ情報と同一である
か否かを常時照合し、二致してhればあら妙しめ定めら
れた伝送順序で、不一致が検出されると、該当情報信号
を他の情報信号より優先的に、上位装置7へ第3図のよ
うな一定長の直列情報信号6に変換して伝送する。直列
情報信号6は、同期信号部、アドレス信号部、情報信号
部より構成されている。 次に本発明の中心である多重情報伝送装置5について、
第41〆1.第5図、第6図を用いて更に詳Jilll
に説明・する。 比較器10の出供力E @ l I+のとき発信’i:
’i 4 ”より一定周期で出力されるロードパルス信
号4′により格納レジスタ8に取り込菫れる(ただし、
格納レジスタ8に既に格納されていた情報はWr情報が
取り込1れる直前にシフトレジスタ9にシフトされる)
。また比較器10は格納レジスタ8の内容とシフトレジ
スタ9の内容が同一であるが否かを照合し、不一致であ
れは信号”1”を出力する。 このようにして信号4は、変化があった時のみ自動的に
格納1ノジスタ8に取り込まれる。伝送順序判定回路1
.3i4よ、メモリ部に各比較器1oの出方状態11(
IIA、・・・、11N)を、各信号源のアドレスと対
応させてaピ憶している。タイマ14によって制fa4
1される直列情報信号6の1デ一タ伝送時間T(第6図
)は2システムの要求に応じて予じめ設定されている。 伝送順序判定回路13は、タイマ14から周期Tのパル
ス信号14′全入力して、予じめ定められた順序に従っ
て各信号4が変化しているか否かをメモリ部に記憶され
ている比較器10の出力状態により判定する。そして、
変化中と判定された場合ばnXT(n>1の整数)の期
間、一定と′l″+1定された場合はmXT(m(nの
整数)の期間、走査部17を制御する走査指示部16へ
の出力信号15の状態(”1″あるいは“0″)全保持
する。そして該期間経過後、信号】5の状態を反転させ
ると同時に、判定筒所ケ次のメモリ部として、同様な動
作を行なう。また、アドレス設定伝送回路18にtt、
判定中のメモリに対応したアドレス情報13′を出力す
る。走査指示部16Iri、伝送順序判定回路13の判
定順序に対応した順序で走査部17を走査する。そして
、伝送順序判定回路13からの信号15の状態が保持さ
れている間は走査部17を固定しておき、イ占号15が
反転したら走査部金欠の箇所に走査する。 アドレス設定伝送回路18は、伝送1−序判定回路13
から送られてくるアドレス″1F¥報13′と走査部1
7が固定されているところのシフトレジスタ9の情報と
から第3図に示すような直列情報信号を作成して、上位
装置7へ伝送する。 以上のような機能をもつ、多重情報伝送装置5から出力
さtt、る直列情報信号6の伝送順序の一例(m−1と
した場合)全、第6図に示す。ただし、A、B、・・・
、Zは各々、信号(1テータ)の全て全意味しており、
Cと丁゛が変化生情報信号を、その他は現在変化してい
ない情報信号を表わしている。 第5図に、多重情報伝送装置ft、 5の他の実施例を
示す。格納レジスタ8.シフトレジスタ9.比較器10
、発信器4′の動作は第4図の場合と全く同僚で、変化
中の信号4は自動的に取り込まれる。 フリップフロップ20は周期Tのクロックパルス19を
入力して、上位装[7への情報信号6の伝送順序におけ
る変化生情報と一定情報とを交互に伝送するだめの1判
定用の信号21を出力する。 エクスクルシブオア(E 011. )ゲート22i1
.比較器IOの出力信号11と、周期Tで交互に0”。 ”1″状態となるフリップフロップ20のljJ 力(
fi号21を入力し、信号21が”()“の期間には信
号11がパ1″、つ筐り変化中111報4に対して”1
″を、1d号21が”1#の期間には信号11が”0“
、つ盪り一定情報4゛に′対して°゛0″を。 伝送アドレス選択回路24に出力する。伝送アドレス選
択回路24は、内部のメモリ部にEO’I:Lゲートの
出力23 (23A、・・・、23N)全信号源アドレ
スと対応させて記憶しており、予しめ定められた順序に
従って該信号23の状態葡刊−ゼしてゆき、信号”1″
全検出すると同時に、対応するアドレスケ走査指示部1
6とアドレス設定伝送回路18に時間Tだけ送る。時間
T経過後、ひき続いて設定順序に従って同様な動作全行
なう。(ただし、ゲート出力信号23がオール10#あ
るいi−tオール“′1″の場合、すなわち情報信号4
が全て一定あるいは全て変化中の場合には、優先伝送解
除回路25より信号゛1”が入力されて、信号23の状
態にit無関係に設定順序に従って各アドレス全周期T
で走査Jk4 yr<都16とアドレス設定伝送回路1
8に送る。)走査指示部16ば、伝送アドレス選択回路
24より送られてくるアドレスに対応した位置情報12
(12A、・・・、12N)が。 アドレス設定伝送回路18に入力されるように自動的に
走査部を固定する。アドレス設定伝送回路18の動作は
、第4図の実施例の場合と同様である。 以上のような機能をもつ多重情報伝送回路5がら出力さ
れる直列情報信号6の、伝送順序の一例を第7図および
第8図に示す。ただし、A、j(。 ・・、Zは各々、信号(1データ)の全てを慧味してお
り、第7図でばCが、第8図では(シとFが変化中1d
号ケ表わし7ている、 第4図に示した本発明の多重情報伝送回路5の実施例の
特徴としては、?信号諒からの情報を伝送する一周期当
りに、一定情報が伝送さね、るのはIη回であるのに対
[−で、変化中情報はn回(mくn)伝送されるような
構成となっていて、→ビ時藺内に伝送される回数が一定
情報よりも変化中ift報の方が多くなっているという
ことでメイ。また。 第5図に示した実施例の特徴としては、変化中の情報と
一定1i#報と金必ず交〜、に伝送するようにしたこと
であり、込ずれの場合も同一伝送路における各情報信号
の待1時間、すなわち、]・ララフツク1が最小化さ1
することは容易に理解でき、Lう、本発明によれtよ、
変化中である信号金目動的に後先伝送し、かつ全信号の
トラヒックit最小化することが可能であり、動力炉の
」、うに多数の・1に報音伝送する必要がある原子炉1
″ft@i糸に適用すると、その工業的前値it<めて
大きい。
[-, it is desirable to increase the transmission capacity of the entire system economically. However, in the conventional in-plant information transmission system,
Since variable information and constant information were transmitted at the same frequency, or conversely, only Hg information was transmitted when variable information existed, it was difficult to minimize the traffic allocation for all information. did not become. The purpose of the present invention is to constantly monitor whether or not a changing information signal exists, and when changing information does not exist, all the information is sent in a certain order and period, and when it does exist, changing information is prioritized. The present invention is directed to providing an information transmission device which performs serial VC transmission to a host device while minimizing the traffic of all information signals. The previous value and current value of the input information signal are successively compared, and when a discrepancy occurs, that is, when the information is changing, the information is given priority over other constant information and the information is changing. The feature is that information signals are transmitted in an l1ljl order that minimizes the amount of traffic for all signals. The above seven embodiments of the present invention will be described in detail using the drawings. FIG. 1 shows one embodiment of the invention. In the same figure,
Signal source 1 (IA, . . . , IN) supplies signal 2 (2A, . . .
..., 2N> Output to all transmission circuits 3 (3A, .... 3N). The transmission circuit 3Vi creates a serial information signal 4 (4A, . . . 4N)ffi of a fixed length from the signal 2 as shown in FIG. 2, and outputs it to the multiplex information transmission device 5. The multiplex/1H information transmission device 5 receives each transmitted signal 4 (4
A, ..., 4N) is constantly checked to see if it is the same as the previously imported information. The signal is converted into a fixed length serial information signal 6 as shown in FIG. 3 and transmitted to the host device 7 with priority over other information signals. The serial information signal 6 is composed of a synchronization signal section, an address signal section, and an information signal section. Next, regarding the multiplex information transmission device 5 which is the center of the present invention,
No. 41〆1. Further details using Figures 5 and 6.
Explain/do. Output power of comparator 10 when E @ l I+, 'i':
It is taken into the storage register 8 by the load pulse signal 4' outputted from 'i4' at a constant period (however,
The information already stored in the storage register 8 is shifted to the shift register 9 immediately before the Wr information is taken in.)
. Further, the comparator 10 checks whether the contents of the storage register 8 and the contents of the shift register 9 are the same or not, and outputs a signal "1" if they do not match. In this way, the signal 4 is automatically taken into the storage 1 register 8 only when there is a change. Transmission order determination circuit 1
.. 3i4, the output state 11 of each comparator 1o is stored in the memory section (
IIA, . . . , 11N) are stored in a memory in correspondence with the address of each signal source. Controlled by timer 14 fa4
The one data transmission time T (FIG. 6) of the serial information signal 6 to be transmitted is set in advance according to the requirements of the two systems. The transmission order determination circuit 13 inputs all the pulse signals 14' with a period T from the timer 14 and uses a comparator stored in a memory section to determine whether each signal 4 is changing according to a predetermined order. Judgment is made based on the output status of 10. and,
A scanning instruction unit that controls the scanning unit 17 for a period of nXT (an integer of n>1) if it is determined to be changing, and for a period of mXT (an integer of n) if it is determined to be constant. The state (“1” or “0”) of the output signal 15 to the signal 16 is maintained. After the period has elapsed, the state of the signal 5 is inverted, and at the same time, the judgment point is stored in the same manner as the next memory section. The address setting transmission circuit 18 also receives tt,
Address information 13' corresponding to the memory under judgment is output. The scan instruction section 16Iri scans the scanning section 17 in an order corresponding to the determination order of the transmission order determination circuit 13. Then, while the state of the signal 15 from the transmission order determining circuit 13 is maintained, the scanning section 17 is fixed, and when the A symbol 15 is reversed, the scanning section scans the missing part. The address setting transmission circuit 18 includes the transmission 1-order determination circuit 13
Address “1F\information13” sent from and scanning unit 1
A serial information signal as shown in FIG. An example (in the case of m-1) of the transmission order of the serial information signal 6 outputted from the multiplex information transmission device 5 having the above functions is shown in FIG. However, A, B,...
, Z respectively mean all of the signals (1 theta),
C and D represent changing raw information signals, and the others represent information signals that are currently unchanged. FIG. 5 shows another embodiment of the multiplex information transmission device ft,5. Storage register 8. Shift register9. Comparator 10
, the operation of the transmitter 4' is exactly the same as in FIG. 4, and the changing signal 4 is automatically captured. The flip-flop 20 inputs a clock pulse 19 with a period T and outputs a signal 21 for determining whether to alternately transmit variable information and constant information in the transmission order of the information signal 6 to the host device [7]. do. Exclusive OR (E 011.) Gate 22i1
.. The output signal 11 of the comparator IO and the ljJ force (
Fi No. 21 is input, and during the period when the signal 21 is "()", the signal 11 is Pa 1", and when the signal 21 is changing, it is "1" for the 111 report 4.
”, the signal 11 is “0” during the period when the 1d number 21 is “1#”
, the transmission constant information 4' is outputted to the transmission address selection circuit 24. The transmission address selection circuit 24 stores the output 23 (23A) of the EO'I:L gate in the internal memory section. ,..., 23N) are stored in correspondence with all signal source addresses, and the state of the signal 23 is changed in accordance with a predetermined order until the signal "1"
At the same time as all detections, the corresponding address scan instruction section 1
6 and sends the time T to the address setting transmission circuit 18. After the time T has elapsed, all similar operations are performed in accordance with the set order. (However, if the gate output signal 23 is all 10# or all i-t "'1", that is, the information signal 4
are all constant or are all changing, the signal ``1'' is input from the priority transmission cancellation circuit 25, and the total period T of each address is set in accordance with the setting order regardless of the state of the signal 23.
Scan Jk4 yr<To 16 and address setting transmission circuit 1
Send to 8. ) The scanning instruction unit 16 outputs position information 12 corresponding to the address sent from the transmission address selection circuit 24.
(12A,..., 12N). The scanning unit is automatically fixed so as to be input to the address setting transmission circuit 18. The operation of the address setting transmission circuit 18 is similar to that of the embodiment shown in FIG. An example of the transmission order of the serial information signal 6 output from the multiplexed information transmission circuit 5 having the above-mentioned functions is shown in FIGS. 7 and 8. However, A, j (. . . , Z each take advantage of the entire signal (1 data), and in Fig. 7, C takes advantage of it, and in Fig. 8, (1 d while C and F change)
What are the features of the embodiment of the multiplexed information transmission circuit 5 of the present invention shown in FIG. 4? In one cycle of transmitting information from a signal, constant information is transmitted Iη times, whereas changing information is transmitted n times (m × n). This is probably because changing IFT information is transmitted more times than fixed information during a → time period. Also. A feature of the embodiment shown in FIG. 5 is that changing information and fixed 1i# information are always transmitted at the same time, and even in the case of mixed information, each information signal on the same transmission path Waiting for 1 hour, i.e. ]・Raraftsk 1 is minimized 1
It is easy to understand that the present invention
It is possible to dynamically transmit signals that are changing and to minimize the total signal traffic, and it is possible to transmit signals to a large number of reactors in a power reactor.
When applied to ``ft@i yarn, its industrial value is very large.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は 本発明における全体構成図、第2図。 第3図は情報信号フォーマットの一例を示す1ン1、第
4図、第5図は本発明の実施例図、第6図、第7図およ
び第8図は実施例によって得られる(J先直列伝送順序
の例を示す説明図である。 1・・・1.」4源、3・・・伝送回路、5・・・多重
・1′η゛報伝送装冒、7・・・上仙装畜。 〒hr
FIG. 1 is an overall configuration diagram of the present invention, and FIG. 2 is a diagram showing the overall configuration of the present invention. FIG. 3 shows an example of the information signal format; FIGS. 4 and 5 are examples of the present invention; FIGS. It is an explanatory diagram showing an example of the serial transmission order. 1...1." 4 sources, 3... transmission circuit, 5... multiplex/1'η" information transmission equipment, 7... superior sender. Livestock stocking. 〒hr

Claims (1)

【特許請求の範囲】 1、複数の信号源より送られてくる悄@を取り込む手段
、取り込んだ情報が前回取り込んだ情報と一致している
か否かを判定する手段、該情報を多重化する手段、およ
び、情報の直列伝送の順序全制御する手段を有する多重
情報伝送装置の送信部において、情報の伝送の順序を、
前回値と今回価が一致しないものけn(n〉lの整数)
回、一致しているものはm (m (nの整数)回連線
して、あるいは各々を交互に伝送するようにしたことを
特徴とする多重情報伝送装置。 2 情報の変化率に応じてnまたはmを制御するように
したことを特徴とする特許請求の範囲第1項記載の多重
情報伝送装置。
[Claims] 1. Means for capturing yu@ sent from a plurality of signal sources, means for determining whether the captured information matches the previously captured information, and means for multiplexing the information. , and in a transmitting unit of a multiplex information transmission apparatus having means for controlling the order of serial transmission of information, the order of transmission of information is controlled by
Monoke n (integer where n>l) whose previous value and current value do not match
2. A multiplex information transmission device characterized in that the information that matches the information is connected m (m (an integer of n) times) or is alternately transmitted. 2. According to the rate of change of information. 2. The multiplex information transmission apparatus according to claim 1, wherein n or m is controlled.
JP2445282A 1982-02-19 1982-02-19 Multiplex information transmitter Pending JPS58142651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2445282A JPS58142651A (en) 1982-02-19 1982-02-19 Multiplex information transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2445282A JPS58142651A (en) 1982-02-19 1982-02-19 Multiplex information transmitter

Publications (1)

Publication Number Publication Date
JPS58142651A true JPS58142651A (en) 1983-08-24

Family

ID=12138543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2445282A Pending JPS58142651A (en) 1982-02-19 1982-02-19 Multiplex information transmitter

Country Status (1)

Country Link
JP (1) JPS58142651A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6093520A (en) * 1983-10-27 1985-05-25 Toshiba Corp Abnormality diagnosing device of plant operation
JPS60180245A (en) * 1984-02-27 1985-09-14 Nec Corp Priority transmission system
JPS60242748A (en) * 1984-05-17 1985-12-02 Oki Electric Ind Co Ltd Remote supervisory and controlling system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6093520A (en) * 1983-10-27 1985-05-25 Toshiba Corp Abnormality diagnosing device of plant operation
JPS60180245A (en) * 1984-02-27 1985-09-14 Nec Corp Priority transmission system
JPS60242748A (en) * 1984-05-17 1985-12-02 Oki Electric Ind Co Ltd Remote supervisory and controlling system

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