JPS5780844A - Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication - Google Patents

Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication

Info

Publication number
JPS5780844A
JPS5780844A JP15647180A JP15647180A JPS5780844A JP S5780844 A JPS5780844 A JP S5780844A JP 15647180 A JP15647180 A JP 15647180A JP 15647180 A JP15647180 A JP 15647180A JP S5780844 A JPS5780844 A JP S5780844A
Authority
JP
Japan
Prior art keywords
slave station
master station
station
delay
slave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15647180A
Other languages
Japanese (ja)
Inventor
Nobuo Takenaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15647180A priority Critical patent/JPS5780844A/en
Publication of JPS5780844A publication Critical patent/JPS5780844A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To set a delay quantity for each slave station efficiently to cope with the step-out of the phase synchronization rapidly in a master station, by changing delay information to receive continuously the burst signal, which is returned from each slave station, in the master station. CONSTITUTION:Each slave station of the time division multiway multiple digital communication between a master station and plural slave stations is provided with a programmable delay circuit 10, a counter 11, and a counter 12 connected to a clock generating circuit 13 and a frequency dividing circuit 14. Delay quantities of the input signal and the burst signal from a slave station transmission data signal input terminal 15 and a slave station transmission burst control signal input terminal 16 of the circuit 10 are changed by the delay quantity setting input. These data and burst signals which have delay quantities changed are outputted from a slave station transmission output terminal 17 and a slave station transmission burst control signal output terminal 18. In case of the step-out of the phase synchronization, outputted transmission data and burst control signal are supplied to the master station and are processed rapidly in the master station.
JP15647180A 1980-11-08 1980-11-08 Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication Pending JPS5780844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15647180A JPS5780844A (en) 1980-11-08 1980-11-08 Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15647180A JPS5780844A (en) 1980-11-08 1980-11-08 Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication

Publications (1)

Publication Number Publication Date
JPS5780844A true JPS5780844A (en) 1982-05-20

Family

ID=15628468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15647180A Pending JPS5780844A (en) 1980-11-08 1980-11-08 Centralized control system of master station for delay quantity of slave station in time division multiway multiple digital communication

Country Status (1)

Country Link
JP (1) JPS5780844A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601950A (en) * 1983-06-16 1985-01-08 Matsushita Electric Ind Co Ltd Signal transmitter
JPS62232231A (en) * 1986-04-01 1987-10-12 Nitsuko Corp Compensation method for delay in master equipment loopback type synchronizing bus transmission line
JPH03157032A (en) * 1989-05-24 1991-07-05 American Teleph & Telegr Co <Att> Multichannel multipoint network obtained by using time-division multiplexing process
US5619158A (en) * 1995-08-18 1997-04-08 International Business Machines Corp. Hierarchical clocking system using adaptive feedback

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601950A (en) * 1983-06-16 1985-01-08 Matsushita Electric Ind Co Ltd Signal transmitter
JPS62232231A (en) * 1986-04-01 1987-10-12 Nitsuko Corp Compensation method for delay in master equipment loopback type synchronizing bus transmission line
JPH03157032A (en) * 1989-05-24 1991-07-05 American Teleph & Telegr Co <Att> Multichannel multipoint network obtained by using time-division multiplexing process
US5619158A (en) * 1995-08-18 1997-04-08 International Business Machines Corp. Hierarchical clocking system using adaptive feedback

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