JPS5779567A - Credit processor - Google Patents
Credit processorInfo
- Publication number
- JPS5779567A JPS5779567A JP55156161A JP15616180A JPS5779567A JP S5779567 A JPS5779567 A JP S5779567A JP 55156161 A JP55156161 A JP 55156161A JP 15616180 A JP15616180 A JP 15616180A JP S5779567 A JPS5779567 A JP S5779567A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- record
- transaction information
- week
- credit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q40/00—Finance; Insurance; Tax strategies; Processing of corporate or income taxes
- G06Q40/02—Banking, e.g. interest calculation or account maintenance
Landscapes
- Business, Economics & Management (AREA)
- Accounting & Taxation (AREA)
- Finance (AREA)
- Engineering & Computer Science (AREA)
- Development Economics (AREA)
- Economics (AREA)
- Marketing (AREA)
- Strategic Management (AREA)
- Technology Law (AREA)
- Physics & Mathematics (AREA)
- General Business, Economics & Management (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Cash Registers Or Receiving Machines (AREA)
Abstract
PURPOSE:To reduce the necessary capacity of a memory as much as possible by providing record parts, wherein pieces of transaction information on credit, withdrawal, etc., by week unit and month unit, as many as for 12 weeks and 6 months. CONSTITUTION:When transaction data is inputted, a CPU13 checks it by the item record memory 16 of a RAM15 to set week record in a 12-week record memory 18. When every record part of the memory 18 has transaction information, the status of an area 17 is checked and when credit is finished, the contents of the memory 18 except the finished credit are transferred to the work area 17 to modify the week record. When it is not finished, the transaction information is printed 11 and the contents of the area 17 are transferred to the memory 18 to modify the week record. After finishing the process for setting of the transaction information for the memory 18, the CPU13 process the transaction information for a 6-month record memory 19 similarly.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156161A JPS5779567A (en) | 1980-11-06 | 1980-11-06 | Credit processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156161A JPS5779567A (en) | 1980-11-06 | 1980-11-06 | Credit processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5779567A true JPS5779567A (en) | 1982-05-18 |
Family
ID=15621675
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55156161A Pending JPS5779567A (en) | 1980-11-06 | 1980-11-06 | Credit processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5779567A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7593900B2 (en) * | 2003-11-07 | 2009-09-22 | Kabushiki Kaisha Toshiba | Host device, memory card, memory capacity changing method, memory capacity changing program and memory capacity charge giving/receiving method |
-
1980
- 1980-11-06 JP JP55156161A patent/JPS5779567A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7593900B2 (en) * | 2003-11-07 | 2009-09-22 | Kabushiki Kaisha Toshiba | Host device, memory card, memory capacity changing method, memory capacity changing program and memory capacity charge giving/receiving method |
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