JPS57761A - Monitoring system for operation state of decentralized processor - Google Patents

Monitoring system for operation state of decentralized processor

Info

Publication number
JPS57761A
JPS57761A JP2398280A JP2398280A JPS57761A JP S57761 A JPS57761 A JP S57761A JP 2398280 A JP2398280 A JP 2398280A JP 2398280 A JP2398280 A JP 2398280A JP S57761 A JPS57761 A JP S57761A
Authority
JP
Japan
Prior art keywords
processor
slave
operation state
monitoring system
master processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2398280A
Other languages
Japanese (ja)
Inventor
Hiroshi Fujiwara
Atomi Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP2398280A priority Critical patent/JPS57761A/en
Publication of JPS57761A publication Critical patent/JPS57761A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To monitor a state without increasing the number of monitoring lines, by modulating the operation signal of each slave processor by slave processors at an independent frequency and then by sending the resulting signal to a master processor side.
CONSTITUTION: At each slave processor 2 side of ladder constitution, an operation monitoring circuit 21 is provided and an output 23 is generated according to whether an operation state monitoring signal 22 is abnormal or not and sent out to a master processor 1 via a transmitting and receiving circuit 24 by being frequency-modulated by the slave processors 2. Therefore, the master processor 1 side monitors only the modulation frequency to monitor the slave processors 2.
COPYRIGHT: (C)1982,JPO&Japio
JP2398280A 1980-02-29 1980-02-29 Monitoring system for operation state of decentralized processor Pending JPS57761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2398280A JPS57761A (en) 1980-02-29 1980-02-29 Monitoring system for operation state of decentralized processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2398280A JPS57761A (en) 1980-02-29 1980-02-29 Monitoring system for operation state of decentralized processor

Publications (1)

Publication Number Publication Date
JPS57761A true JPS57761A (en) 1982-01-05

Family

ID=12125764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2398280A Pending JPS57761A (en) 1980-02-29 1980-02-29 Monitoring system for operation state of decentralized processor

Country Status (1)

Country Link
JP (1) JPS57761A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015087471A1 (en) * 2013-12-13 2015-06-18 International Business Machines Corporation Framework to provide time bound execution of co-processor commands

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015087471A1 (en) * 2013-12-13 2015-06-18 International Business Machines Corporation Framework to provide time bound execution of co-processor commands
US9817670B2 (en) 2013-12-13 2017-11-14 International Business Machines Corporation Framework to provide time bound execution of co-processor commands
US9898301B2 (en) 2013-12-13 2018-02-20 International Business Machines Corporation Framework to provide time bound execution of co-processor commands

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