JPS5757351A - Data processor incorporating state history storage device - Google Patents

Data processor incorporating state history storage device

Info

Publication number
JPS5757351A
JPS5757351A JP55132606A JP13260680A JPS5757351A JP S5757351 A JPS5757351 A JP S5757351A JP 55132606 A JP55132606 A JP 55132606A JP 13260680 A JP13260680 A JP 13260680A JP S5757351 A JPS5757351 A JP S5757351A
Authority
JP
Japan
Prior art keywords
data processor
state history
storage device
history storage
processor incorporating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55132606A
Other languages
Japanese (ja)
Inventor
Shuichi Hanatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55132606A priority Critical patent/JPS5757351A/en
Publication of JPS5757351A publication Critical patent/JPS5757351A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To realize the observation of state history in each cycle of a flip-flop (FF) selected optionally, by storing the state of an FF at a data processor part that is read out through scanning. CONSTITUTION:A machine cycle is sufficiently increased for a hardware debug, and an optional FF is selected out of all FFsF1-F9 within a data processor part 1 when a data processor is actuated. Then the state history in each cycle of the selected FF is stored in a state history device 5. Accordingly, the FFsF1-F9 can be all observed by selecting properly the FF.
JP55132606A 1980-09-24 1980-09-24 Data processor incorporating state history storage device Pending JPS5757351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55132606A JPS5757351A (en) 1980-09-24 1980-09-24 Data processor incorporating state history storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55132606A JPS5757351A (en) 1980-09-24 1980-09-24 Data processor incorporating state history storage device

Publications (1)

Publication Number Publication Date
JPS5757351A true JPS5757351A (en) 1982-04-06

Family

ID=15085257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55132606A Pending JPS5757351A (en) 1980-09-24 1980-09-24 Data processor incorporating state history storage device

Country Status (1)

Country Link
JP (1) JPS5757351A (en)

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