JPS5745948A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5745948A
JPS5745948A JP55121526A JP12152680A JPS5745948A JP S5745948 A JPS5745948 A JP S5745948A JP 55121526 A JP55121526 A JP 55121526A JP 12152680 A JP12152680 A JP 12152680A JP S5745948 A JPS5745948 A JP S5745948A
Authority
JP
Japan
Prior art keywords
type
well
layers
gates
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55121526A
Other languages
Japanese (ja)
Other versions
JPH0113223B2 (en
Inventor
Takeo Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55121526A priority Critical patent/JPS5745948A/en
Publication of JPS5745948A publication Critical patent/JPS5745948A/en
Publication of JPH0113223B2 publication Critical patent/JPH0113223B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To obtain an IC having basic cells which can readily perform a circuit that cannot be performed by a conventional master slice type by independently forming a part of a gate electrode of a complementary MISFET. CONSTITUTION:P type layers 21-24 are formed on an N type Si substrate, and are connected to form 3 P-channel MISFET TR1-TR3. A P type power source line VD is passed underneath the layers 21-24 without contact with the layers. A P type well is formed adjacently to the TR1-TR3, N type layers 25-28 are formed at an interval in the well, and are connected to form 3 N-channel MISFET TR4- TR6. A P type power source line VS passing underneath the P-well without contact with the well is formed, and the P-well is shortcircuited via the P type layer with the line VS. The gates of the TR3 and TR6 are connected via lines 207 and the other gates are independent. Connecting windows 201, 202, 206 and 208 forming the buried wire 208 of polysilicon are formed at the side of the FET as unit cells. When the IC including the unit cells are used for the master slice, a complicate circuit can be extremely readily wired.
JP55121526A 1980-09-02 1980-09-02 Semiconductor integrated circuit device Granted JPS5745948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121526A JPS5745948A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121526A JPS5745948A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63099777A Division JPS63296240A (en) 1988-04-22 1988-04-22 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5745948A true JPS5745948A (en) 1982-03-16
JPH0113223B2 JPH0113223B2 (en) 1989-03-03

Family

ID=14813400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121526A Granted JPS5745948A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5745948A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5749253A (en) * 1980-09-09 1982-03-23 Toshiba Corp Semiconductor integrated circuit
JPS5944843A (en) * 1982-09-07 1984-03-13 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPS6074549A (en) * 1983-09-30 1985-04-26 Fujitsu Ltd Semiconductor device
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver
US6399972B1 (en) * 2000-03-13 2002-06-04 Oki Electric Industry Co., Ltd. Cell based integrated circuit and unit cell architecture therefor
JP2010103185A (en) * 2008-10-21 2010-05-06 Nec Corp Cell-data generating method in semiconductor integrated circuit and design method for semiconductor integrated circuit
WO2019064607A1 (en) 2017-09-30 2019-04-04 朝日インテック株式会社 Guide wire

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363877A (en) * 1976-11-18 1978-06-07 Fujitsu Ltd Production of semiconductor device
JPS541724A (en) * 1977-05-31 1979-01-08 Bendix Corp Dual mode hybrid controller for controlling operation of electronic type fuel injector of internal combustion engine that can be operated at various kinds of speed of revolution
JPS541725A (en) * 1977-06-07 1979-01-08 Kitamura Shuichi Variable venturi carbureter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363877A (en) * 1976-11-18 1978-06-07 Fujitsu Ltd Production of semiconductor device
JPS541724A (en) * 1977-05-31 1979-01-08 Bendix Corp Dual mode hybrid controller for controlling operation of electronic type fuel injector of internal combustion engine that can be operated at various kinds of speed of revolution
JPS541725A (en) * 1977-06-07 1979-01-08 Kitamura Shuichi Variable venturi carbureter

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5749253A (en) * 1980-09-09 1982-03-23 Toshiba Corp Semiconductor integrated circuit
JPH0253949B2 (en) * 1980-09-09 1990-11-20 Tokyo Shibaura Electric Co
JPS5944843A (en) * 1982-09-07 1984-03-13 Mitsubishi Electric Corp Semiconductor integrated circuit device
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver
JPS6074549A (en) * 1983-09-30 1985-04-26 Fujitsu Ltd Semiconductor device
US6399972B1 (en) * 2000-03-13 2002-06-04 Oki Electric Industry Co., Ltd. Cell based integrated circuit and unit cell architecture therefor
US6905931B2 (en) 2000-03-13 2005-06-14 Oki Electric Industry Co., Ltd. Cell based integrated circuit and unit cell architecture therefor
US7422945B2 (en) 2000-03-13 2008-09-09 Oki Electric Industry Co., Ltd. Cell based integrated circuit and unit cell architecture therefor
US7704837B2 (en) 2000-03-13 2010-04-27 Oki Semiconductor Co., Ltd. Cell based integrated circuit and unit cell architecture therefor
JP2010103185A (en) * 2008-10-21 2010-05-06 Nec Corp Cell-data generating method in semiconductor integrated circuit and design method for semiconductor integrated circuit
WO2019064607A1 (en) 2017-09-30 2019-04-04 朝日インテック株式会社 Guide wire
EP4059557A2 (en) 2017-09-30 2022-09-21 Asahi Intecc Co., Ltd. Guide wire

Also Published As

Publication number Publication date
JPH0113223B2 (en) 1989-03-03

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