JPS5741752A - Address extending system of main storage - Google Patents

Address extending system of main storage

Info

Publication number
JPS5741752A
JPS5741752A JP11481580A JP11481580A JPS5741752A JP S5741752 A JPS5741752 A JP S5741752A JP 11481580 A JP11481580 A JP 11481580A JP 11481580 A JP11481580 A JP 11481580A JP S5741752 A JPS5741752 A JP S5741752A
Authority
JP
Japan
Prior art keywords
main storage
address
data
register
physical space
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11481580A
Other languages
Japanese (ja)
Inventor
Akio Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11481580A priority Critical patent/JPS5741752A/en
Publication of JPS5741752A publication Critical patent/JPS5741752A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To realize an access to whole physical space of a main storage, by providing a location register for fetching instruction that is capable of direct addressing to the physical space of the main storage and an address conversion table. CONSTITUTION:A system is equipped with a location register 3 able to directly address the physical space of a main storage, and an address conversion table 4 which converts a logic space into a physical space in terms of address, in addition, a memory address register 9 showing the position of the logic space for an access of the data. A data processor in addition to these units, includes a main storage device 1, an instruction register 10 that sets the instruction read out of the device 1, and a data buffer register 11 that sets the data read out of the device 1 or extracts the data which is written into the main storage 1.
JP11481580A 1980-08-22 1980-08-22 Address extending system of main storage Pending JPS5741752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11481580A JPS5741752A (en) 1980-08-22 1980-08-22 Address extending system of main storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11481580A JPS5741752A (en) 1980-08-22 1980-08-22 Address extending system of main storage

Publications (1)

Publication Number Publication Date
JPS5741752A true JPS5741752A (en) 1982-03-09

Family

ID=14647369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11481580A Pending JPS5741752A (en) 1980-08-22 1980-08-22 Address extending system of main storage

Country Status (1)

Country Link
JP (1) JPS5741752A (en)

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