JPS5731239A - Decoder - Google Patents
DecoderInfo
- Publication number
- JPS5731239A JPS5731239A JP10692980A JP10692980A JPS5731239A JP S5731239 A JPS5731239 A JP S5731239A JP 10692980 A JP10692980 A JP 10692980A JP 10692980 A JP10692980 A JP 10692980A JP S5731239 A JPS5731239 A JP S5731239A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- bit
- code
- shifter
- unequal length
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/40—Conversion to or from variable length codes, e.g. Shannon-Fano code, Huffman code, Morse code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding
- G06T9/005—Statistical coding, e.g. Huffman, run length coding
Abstract
PURPOSE:To simplify the constitution of circuit and at the same time realize a high- speed operation, by using an array reverse converting circuit that converts the compressed data into an unequal length code having separated parallel bits. CONSTITUTION:The synchronous signal is detected out of the parallel 4-bit data in a memory 18 through a synchronous bit detecting circuit 19 of an unequal length code reverse converting circuit 36. The highest bit on a signal line 210 is delivered by a shifter which is controlled by a register 20 and a bit shift deciding circuit so that the highest bit becomes the 1st bit of the unequal length code that received an array reverse conversion. The output of a shifter 17 is decided by the 2nd code converter 15. Based on the result of this decision, the number of shifts is decided by a shift number deciding circuit consisting of an adder 21, a comparison/arithmetic circuit 16 and a register 22. Then the shifter 17 is controlled. Furthermore a control circuit 13 controls coders 14 and 15 based on the contents of a compressed code, and the original multi-value time series code is obtained from the coder 14 to be applied to a DPCM decoder 12.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10692980A JPS5731239A (en) | 1980-08-04 | 1980-08-04 | Decoder |
CA000382940A CA1189974A (en) | 1980-08-04 | 1981-07-31 | Code conversion system |
US06/550,946 US4534055A (en) | 1980-08-04 | 1983-11-14 | Code conversion system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10692980A JPS5731239A (en) | 1980-08-04 | 1980-08-04 | Decoder |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5731239A true JPS5731239A (en) | 1982-02-19 |
JPH0214821B2 JPH0214821B2 (en) | 1990-04-10 |
Family
ID=14446088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10692980A Granted JPS5731239A (en) | 1980-08-04 | 1980-08-04 | Decoder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5731239A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6156522A (en) * | 1984-07-28 | 1986-03-22 | Fujitsu Ltd | Variable length dpcm decoding circuit |
JPS62136131A (en) * | 1985-12-10 | 1987-06-19 | Canon Inc | Data decoder |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0468129A (en) * | 1990-07-06 | 1992-03-03 | Hitachi Constr Mach Co Ltd | Device for connecting pin |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3971888A (en) * | 1975-04-02 | 1976-07-27 | Bell Telephone Laboratories, Incorporated | Synchronization system for variable length encoded signals |
-
1980
- 1980-08-04 JP JP10692980A patent/JPS5731239A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3971888A (en) * | 1975-04-02 | 1976-07-27 | Bell Telephone Laboratories, Incorporated | Synchronization system for variable length encoded signals |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6156522A (en) * | 1984-07-28 | 1986-03-22 | Fujitsu Ltd | Variable length dpcm decoding circuit |
JPS62136131A (en) * | 1985-12-10 | 1987-06-19 | Canon Inc | Data decoder |
Also Published As
Publication number | Publication date |
---|---|
JPH0214821B2 (en) | 1990-04-10 |
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