JPS5725770A - Analog-to-digital converting circuit of solid state scanner - Google Patents

Analog-to-digital converting circuit of solid state scanner

Info

Publication number
JPS5725770A
JPS5725770A JP10075080A JP10075080A JPS5725770A JP S5725770 A JPS5725770 A JP S5725770A JP 10075080 A JP10075080 A JP 10075080A JP 10075080 A JP10075080 A JP 10075080A JP S5725770 A JPS5725770 A JP S5725770A
Authority
JP
Japan
Prior art keywords
value
conversion
picture signal
analog
maximum value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10075080A
Other languages
Japanese (ja)
Inventor
Yoshiaki Kamimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP10075080A priority Critical patent/JPS5725770A/en
Publication of JPS5725770A publication Critical patent/JPS5725770A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To obtain a coincidence between the miximum value of the picture signal received a photoelectric conversion and having an amplitude fluctuation and the maximum value after an A/D conversion, by holding the peak value of the picture signal and then converting the picture signal into a digital signal with the held output used as the reference value. CONSTITUTION:A photoelectric conversion is given to the original information through a CCD2, and the peak value of the picture signal PS amplified by an amplifier 3 is detected through a peak value holding circuit 4 to be held. The output of the circuit 4 is supplied to the reference value terminal of an A/D converter 1 in the form of the reference value. The signals PS supplied from the amplifier 3 are converted into digital signals D1-D3 to be delivered. Then the peak value receives an A/D conversion through the onverter 1 and in the form of the maximum value. Thus a coincidence is obtained between the maximum value of the signal received a photoelectric conversion and having an amplitude fluctuation and the maximum value after an A/D conversion.
JP10075080A 1980-07-23 1980-07-23 Analog-to-digital converting circuit of solid state scanner Pending JPS5725770A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10075080A JPS5725770A (en) 1980-07-23 1980-07-23 Analog-to-digital converting circuit of solid state scanner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10075080A JPS5725770A (en) 1980-07-23 1980-07-23 Analog-to-digital converting circuit of solid state scanner

Publications (1)

Publication Number Publication Date
JPS5725770A true JPS5725770A (en) 1982-02-10

Family

ID=14282198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10075080A Pending JPS5725770A (en) 1980-07-23 1980-07-23 Analog-to-digital converting circuit of solid state scanner

Country Status (1)

Country Link
JP (1) JPS5725770A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193619A (en) * 1983-04-18 1984-11-02 Matsushita Electric Ind Co Ltd Picture processing circuit
JPS6121693A (en) * 1984-07-10 1986-01-30 Matsushita Electric Ind Co Ltd Video signal processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193619A (en) * 1983-04-18 1984-11-02 Matsushita Electric Ind Co Ltd Picture processing circuit
JPS6121693A (en) * 1984-07-10 1986-01-30 Matsushita Electric Ind Co Ltd Video signal processor

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