JPS57153320A - Clock supplying system - Google Patents

Clock supplying system

Info

Publication number
JPS57153320A
JPS57153320A JP56039196A JP3919681A JPS57153320A JP S57153320 A JPS57153320 A JP S57153320A JP 56039196 A JP56039196 A JP 56039196A JP 3919681 A JP3919681 A JP 3919681A JP S57153320 A JPS57153320 A JP S57153320A
Authority
JP
Japan
Prior art keywords
circuit
reference clock
clock
logical sum
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56039196A
Other languages
Japanese (ja)
Inventor
Tatsuo Yajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56039196A priority Critical patent/JPS57153320A/en
Publication of JPS57153320A publication Critical patent/JPS57153320A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Abstract

PURPOSE:To decrease the number of control lines and their interfaces and to simplify the constitution, by using a logical sum circuit, a reference clock detecting circuit and a logical product circuit. CONSTITUTION:Each time data generating means 2 has a clock counting section 20 connecting clocks and generating time data, and its internal clock circuit 21. Each clock switching means 3 consists of a reference clock detecting circuit 30, a logical product circuit 31, and a logical sum circuit 32. A reference clock generated at a master reference clock generating means 1 is applied to each clock switching means 3 via a reference clock line 100. The reference clock is applied to an input side of the above-mentioned detecting circuit 30 and one input of above-mentioned logical sum circuit 32.
JP56039196A 1981-03-18 1981-03-18 Clock supplying system Pending JPS57153320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56039196A JPS57153320A (en) 1981-03-18 1981-03-18 Clock supplying system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56039196A JPS57153320A (en) 1981-03-18 1981-03-18 Clock supplying system

Publications (1)

Publication Number Publication Date
JPS57153320A true JPS57153320A (en) 1982-09-21

Family

ID=12546361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56039196A Pending JPS57153320A (en) 1981-03-18 1981-03-18 Clock supplying system

Country Status (1)

Country Link
JP (1) JPS57153320A (en)

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