JPS57133643A - Bonding method - Google Patents

Bonding method

Info

Publication number
JPS57133643A
JPS57133643A JP56019108A JP1910881A JPS57133643A JP S57133643 A JPS57133643 A JP S57133643A JP 56019108 A JP56019108 A JP 56019108A JP 1910881 A JP1910881 A JP 1910881A JP S57133643 A JPS57133643 A JP S57133643A
Authority
JP
Japan
Prior art keywords
lead
thermode
bump
chip
pressed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56019108A
Other languages
Japanese (ja)
Other versions
JPS6347142B2 (en
Inventor
Kenichi Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56019108A priority Critical patent/JPS57133643A/en
Publication of JPS57133643A publication Critical patent/JPS57133643A/en
Publication of JPS6347142B2 publication Critical patent/JPS6347142B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79—Apparatus for Tape Automated Bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To perform a perfect bonding work by a method wherein, when the bump of the IC chip is soldered at the end section of the lead which is provided on the film carrier, the solder is solidified while a thermode (electrode tip), to be pressed on these materials, is pressed for a fixed period of time in the state wherein the thermode is slightly raised relatively from the material to be joined together. CONSTITUTION:The lead 2, having an end protruding toward the opening of the film carrier 1, is faced downward, and the chip 3 is positioned under the lead 2 while contacting the bump 4 of the IC chip 3 to the end section of the lead. Then, the thermode 6, which is surrounded by a spring 11 attached to a spring mounting plate 10 and having a shaft passing through a mounting plate 10, is faced to the opening of the carrier 1, the thermode 6 is pushed down and the lead 2 is contacted to it, and the lead 2 and the bump 4 are adhered through the intermediary of a solder layer. In this constitution, the amount of deflection of the spring 11 is regulated using a cam and the like, the thermode 6 is relatively raised a little from the materials to be joined together, the materials to be joined together are pressed for a fixed period of time, and the fused solder is solidified in the above condition.
JP56019108A 1981-02-13 1981-02-13 Bonding method Granted JPS57133643A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56019108A JPS57133643A (en) 1981-02-13 1981-02-13 Bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56019108A JPS57133643A (en) 1981-02-13 1981-02-13 Bonding method

Publications (2)

Publication Number Publication Date
JPS57133643A true JPS57133643A (en) 1982-08-18
JPS6347142B2 JPS6347142B2 (en) 1988-09-20

Family

ID=11990278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56019108A Granted JPS57133643A (en) 1981-02-13 1981-02-13 Bonding method

Country Status (1)

Country Link
JP (1) JPS57133643A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4994411A (en) * 1988-03-10 1991-02-19 Hitachi, Ltd. Process of producing semiconductor device
US5093281A (en) * 1988-07-13 1992-03-03 Mitsubishi Denki Kabushiki Kaisha method for manufacturing semiconductor devices
WO2010114495A1 (en) * 2009-04-02 2010-10-07 Trimech Technology Pte. Ltd. A thermode assembly

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4994411A (en) * 1988-03-10 1991-02-19 Hitachi, Ltd. Process of producing semiconductor device
US5093281A (en) * 1988-07-13 1992-03-03 Mitsubishi Denki Kabushiki Kaisha method for manufacturing semiconductor devices
WO2010114495A1 (en) * 2009-04-02 2010-10-07 Trimech Technology Pte. Ltd. A thermode assembly

Also Published As

Publication number Publication date
JPS6347142B2 (en) 1988-09-20

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