JPS57120283A - Cash memory control system - Google Patents

Cash memory control system

Info

Publication number
JPS57120283A
JPS57120283A JP56004651A JP465181A JPS57120283A JP S57120283 A JPS57120283 A JP S57120283A JP 56004651 A JP56004651 A JP 56004651A JP 465181 A JP465181 A JP 465181A JP S57120283 A JPS57120283 A JP S57120283A
Authority
JP
Japan
Prior art keywords
memory
directory
register
address
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56004651A
Other languages
Japanese (ja)
Inventor
Takashi Hiraoka
Keizo Aoyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56004651A priority Critical patent/JPS57120283A/en
Publication of JPS57120283A publication Critical patent/JPS57120283A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To refer to the contents of a directory memory easily when a fault occurs, by speeding the test and inspection of a cash memory including the directory memory by enabling a CPU to read and write the directory memory directly. CONSTITUTION:A directory memory 2 referred to in accordance with a memory address 101 from a CPU to judges whether stored information in a main memory resides in a cash memory 1 or not, a register 11 stored temporarily with a directory address 114 from the CPU for reading and writing the memory 2 directly, and a memory address register 4 stored temporarily with information to be written in the memory 2 are provided. Information read out of the memory 2 in accordance with the directory address 114 held in the register 11 is outputted selectively through selectors 13 and 14. The information held in the register 4 is written in the memory 2 through a selector 12 in accordance with the address 114 held in the register 11 to enable the contents of the memory 2 to be referred to and stored optionally.
JP56004651A 1981-01-16 1981-01-16 Cash memory control system Pending JPS57120283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56004651A JPS57120283A (en) 1981-01-16 1981-01-16 Cash memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56004651A JPS57120283A (en) 1981-01-16 1981-01-16 Cash memory control system

Publications (1)

Publication Number Publication Date
JPS57120283A true JPS57120283A (en) 1982-07-27

Family

ID=11589850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56004651A Pending JPS57120283A (en) 1981-01-16 1981-01-16 Cash memory control system

Country Status (1)

Country Link
JP (1) JPS57120283A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0729100A1 (en) * 1995-02-23 1996-08-28 International Business Machines Corporation Cache testing using a modified snoop cycle command

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0729100A1 (en) * 1995-02-23 1996-08-28 International Business Machines Corporation Cache testing using a modified snoop cycle command

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