JPS57107686A - Sampling pulse correcting system - Google Patents
Sampling pulse correcting systemInfo
- Publication number
- JPS57107686A JPS57107686A JP18421380A JP18421380A JPS57107686A JP S57107686 A JPS57107686 A JP S57107686A JP 18421380 A JP18421380 A JP 18421380A JP 18421380 A JP18421380 A JP 18421380A JP S57107686 A JPS57107686 A JP S57107686A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- inputted
- wave shape
- sampling
- broadcast packet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
Abstract
PURPOSE:To achieve a most suited correction sampling pulse to individual packet data, by sampling the data of character broadcast packet without error. CONSTITUTION:A composite video signal video-detected 12 is picked up for character broadcast packet and inputted to a wave shape circuit 13 and also inputted to a synchronizing separation circuit 21 separating a vertical synchronizing signal V and a horizontal synchronizing signal H. The signals V and H from the circuit 21 are inputted to a vertical location counter 22. A pickup pulse from the counter 22 is inputted to a wave shape circuit 13 for pickup of character broadcast packet and wave shape. The output of the circuit 13 is inputted to a sampling circuit 14 and also to a clock line signal detecting circuit 16.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18421380A JPS57107686A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18421380A JPS57107686A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57107686A true JPS57107686A (en) | 1982-07-05 |
JPH027231B2 JPH027231B2 (en) | 1990-02-16 |
Family
ID=16149338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18421380A Granted JPS57107686A (en) | 1980-12-25 | 1980-12-25 | Sampling pulse correcting system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57107686A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54104236A (en) * | 1978-02-02 | 1979-08-16 | Nippon Hoso Kyokai <Nhk> | Synchronizing-signal-phase coupled circuit |
JPS5571368A (en) * | 1978-11-24 | 1980-05-29 | Nec Home Electronics Ltd | Data sampling system |
-
1980
- 1980-12-25 JP JP18421380A patent/JPS57107686A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54104236A (en) * | 1978-02-02 | 1979-08-16 | Nippon Hoso Kyokai <Nhk> | Synchronizing-signal-phase coupled circuit |
JPS5571368A (en) * | 1978-11-24 | 1980-05-29 | Nec Home Electronics Ltd | Data sampling system |
Also Published As
Publication number | Publication date |
---|---|
JPH027231B2 (en) | 1990-02-16 |
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