JPS5698790A - Nonvolatile memory device - Google Patents

Nonvolatile memory device

Info

Publication number
JPS5698790A
JPS5698790A JP117180A JP117180A JPS5698790A JP S5698790 A JPS5698790 A JP S5698790A JP 117180 A JP117180 A JP 117180A JP 117180 A JP117180 A JP 117180A JP S5698790 A JPS5698790 A JP S5698790A
Authority
JP
Japan
Prior art keywords
transistors
write
tyj
tdw
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP117180A
Other languages
Japanese (ja)
Inventor
Michitoku Kamatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP117180A priority Critical patent/JPS5698790A/en
Publication of JPS5698790A publication Critical patent/JPS5698790A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To widen a write power source area by setting at least two kinds of different write resistances and by writing in periodically selecting in order, at least once in writing. CONSTITUTION:Output Xi of an X decoder is inputted to control gates of memory transistors TMij and TMij+1, and only either of digit lines Dj and Dj+1 is selected by selection transistors Tyj and Tyj+1 driven with a Y decoder output and then connected to sense amplifier S1 operating in read operation and transistors TDW driven with a write data signal. Write impedance control transistor TW2 is controlled by the output of low-frequency oscillating circuit G. When its input is at a low level, the write resistance comes to the series resistance of transistors TW1, TDW and Tyj, and when at a high level, it becomes the sum of the parallel resistance of transistors TW1 and TW2 and the series resistance of transistors TDW and Tyj.
JP117180A 1980-01-09 1980-01-09 Nonvolatile memory device Pending JPS5698790A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP117180A JPS5698790A (en) 1980-01-09 1980-01-09 Nonvolatile memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP117180A JPS5698790A (en) 1980-01-09 1980-01-09 Nonvolatile memory device

Publications (1)

Publication Number Publication Date
JPS5698790A true JPS5698790A (en) 1981-08-08

Family

ID=11493979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP117180A Pending JPS5698790A (en) 1980-01-09 1980-01-09 Nonvolatile memory device

Country Status (1)

Country Link
JP (1) JPS5698790A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6040599A (en) * 1983-08-12 1985-03-02 Mitsubishi Electric Corp Memory writing circuit
FR2599176A1 (en) * 1986-05-23 1987-11-27 Eurotechnique Sa MEMORY DEADLY PROGRAMMABLE ELECTRICALLY

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6040599A (en) * 1983-08-12 1985-03-02 Mitsubishi Electric Corp Memory writing circuit
JPS6322392B2 (en) * 1983-08-12 1988-05-11 Mitsubishi Electric Corp
FR2599176A1 (en) * 1986-05-23 1987-11-27 Eurotechnique Sa MEMORY DEADLY PROGRAMMABLE ELECTRICALLY

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