JPS5686556A - Alarm system for opposing station - Google Patents

Alarm system for opposing station

Info

Publication number
JPS5686556A
JPS5686556A JP16282979A JP16282979A JPS5686556A JP S5686556 A JPS5686556 A JP S5686556A JP 16282979 A JP16282979 A JP 16282979A JP 16282979 A JP16282979 A JP 16282979A JP S5686556 A JPS5686556 A JP S5686556A
Authority
JP
Japan
Prior art keywords
alarm
gate
opposing stations
opposing
zero potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16282979A
Other languages
Japanese (ja)
Inventor
Koji Aoki
Hiroshi Yamada
Kenji Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16282979A priority Critical patent/JPS5686556A/en
Publication of JPS5686556A publication Critical patent/JPS5686556A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Abstract

PURPOSE:To prevent the unbalancing of DC due to alarm for opposing stations, by switching the DC balancing control level to two levels being the symmetrical location to the DC zero potential for the alarm for opposing stations. CONSTITUTION:The parallel digital signal subject to speed conversion is fed to a frame insertion section 46 via a shift register 38, and inversion circuit 44. In transmitting the alarm for opposing stations, since the input terminal 52 of the swtich circuit 50 is at logic ''1'', the gate 56 is ON and the gate 54 is OFF. Thus, only CH2 among polarity inversion instructing digits is the logic inverting the output of the correlation device 42, and the insertion section 46 transmits the level different from the DC balancing control level and being symmetrical to the DC zero potential via a multivalue generating section.
JP16282979A 1979-12-17 1979-12-17 Alarm system for opposing station Pending JPS5686556A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16282979A JPS5686556A (en) 1979-12-17 1979-12-17 Alarm system for opposing station

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16282979A JPS5686556A (en) 1979-12-17 1979-12-17 Alarm system for opposing station

Publications (1)

Publication Number Publication Date
JPS5686556A true JPS5686556A (en) 1981-07-14

Family

ID=15762022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16282979A Pending JPS5686556A (en) 1979-12-17 1979-12-17 Alarm system for opposing station

Country Status (1)

Country Link
JP (1) JPS5686556A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200654A (en) * 1982-05-18 1983-11-22 Nec Corp Communication device
JPS60117945A (en) * 1983-11-30 1985-06-25 Fujitsu Ltd Radio communication system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187909A (en) * 1975-01-30 1976-07-31 Nippon Electric Co
JPS5389608A (en) * 1977-01-18 1978-08-07 Nec Corp Multilevel code transmission system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187909A (en) * 1975-01-30 1976-07-31 Nippon Electric Co
JPS5389608A (en) * 1977-01-18 1978-08-07 Nec Corp Multilevel code transmission system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200654A (en) * 1982-05-18 1983-11-22 Nec Corp Communication device
JPS60117945A (en) * 1983-11-30 1985-06-25 Fujitsu Ltd Radio communication system
JPH0516217B2 (en) * 1983-11-30 1993-03-03 Fujitsu Ltd

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