JPS5671893A - Control system for memory error - Google Patents
Control system for memory errorInfo
- Publication number
- JPS5671893A JPS5671893A JP14615879A JP14615879A JPS5671893A JP S5671893 A JPS5671893 A JP S5671893A JP 14615879 A JP14615879 A JP 14615879A JP 14615879 A JP14615879 A JP 14615879A JP S5671893 A JPS5671893 A JP S5671893A
- Authority
- JP
- Japan
- Prior art keywords
- clock pulse
- low level
- parity
- memory
- operation time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To decrease the number of system down times unnecessary and to increase the system operation time, by temporarily extending the memory readout and repeating the retrial to the parity error generation due to temporary noise.
CONSTITUTION: When an impulse noise is input tentatively, the parity error is detected at the parity detection circuit 4 and the parity monitor signal 10 is a waveform as a low level l15. When this low level is input to a system clock pulse generating circuit 6, no frequency division is made at 17 of (b) at the leading pulse 16 of (a), and the system clock pulse keeps high level with the timing 13 of this low level l. In this case, the clock pulse is extended for one period of the clock pulse of (a) and the readout of memory is again made by this. Then, the number of system down times is decreased and the system operation time can be increased.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14615879A JPS5671893A (en) | 1979-11-12 | 1979-11-12 | Control system for memory error |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14615879A JPS5671893A (en) | 1979-11-12 | 1979-11-12 | Control system for memory error |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5671893A true JPS5671893A (en) | 1981-06-15 |
Family
ID=15401435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14615879A Pending JPS5671893A (en) | 1979-11-12 | 1979-11-12 | Control system for memory error |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5671893A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178692A (en) * | 1983-03-29 | 1984-10-09 | Fujitsu Ltd | Information processing device |
JPH02242342A (en) * | 1989-03-15 | 1990-09-26 | Fujitsu Ltd | Error avoiding method for data |
JPH0496846A (en) * | 1990-08-13 | 1992-03-30 | Fujitsu Ltd | Portable terminal device |
-
1979
- 1979-11-12 JP JP14615879A patent/JPS5671893A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178692A (en) * | 1983-03-29 | 1984-10-09 | Fujitsu Ltd | Information processing device |
JPH02242342A (en) * | 1989-03-15 | 1990-09-26 | Fujitsu Ltd | Error avoiding method for data |
JPH0496846A (en) * | 1990-08-13 | 1992-03-30 | Fujitsu Ltd | Portable terminal device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5373340A (en) | Abnormal voltage detection circuit | |
JPS53149076A (en) | Digital frequency detecting circuit | |
JPS54104230A (en) | Processing circuit for vertical synchronizing signal | |
JPS549563A (en) | A-d converter | |
JPS5671893A (en) | Control system for memory error | |
JPS52102773A (en) | Digital rate meter | |
JPS536080A (en) | Frequency detection circuit | |
JPS57175260A (en) | Detector of revolving direction | |
JPS5544939A (en) | Humidity detector | |
JPS53102083A (en) | Discrimination circuit of moving direction | |
JPS5430770A (en) | D-a converter | |
JPS5387617A (en) | Digital signal regnerative repeating unit | |
JPS52111622A (en) | Semiconductor control apparatus | |
JPS5246871A (en) | Device for measurement of automatic phase discriminating allowance | |
JPS53120346A (en) | Correction circuit for double error | |
JPS52127367A (en) | Circuit for detecting maximal minimum value and minamal maximum value | |
JPS53102008A (en) | Demodulation circuit | |
JPS53120329A (en) | Signal detection circuit | |
JPS53129081A (en) | Revolution variation detection system | |
JPS5370415A (en) | Synchronizing circuit for magnetic memory | |
JPS5330857A (en) | Signal change detector circuit | |
JPS5720832A (en) | Interruption input circuit | |
JPS5436125A (en) | Generator circuit for jitter-less pulse signal | |
JPS5369042A (en) | Detecting device for quantification of corona discharge electiric charge | |
JPS54122081A (en) | Integrated circuit for generating timing signal |