JPS5648156A - Transistor - Google Patents

Transistor

Info

Publication number
JPS5648156A
JPS5648156A JP12356979A JP12356979A JPS5648156A JP S5648156 A JPS5648156 A JP S5648156A JP 12356979 A JP12356979 A JP 12356979A JP 12356979 A JP12356979 A JP 12356979A JP S5648156 A JPS5648156 A JP S5648156A
Authority
JP
Japan
Prior art keywords
resistance element
unit transistors
matching circuit
input
capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12356979A
Other languages
Japanese (ja)
Inventor
Naofumi Tsuzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12356979A priority Critical patent/JPS5648156A/en
Publication of JPS5648156A publication Critical patent/JPS5648156A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6644Packaging aspects of high-frequency amplifiers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Abstract

PURPOSE:To obtain high output in a stable and low loss state by providing a resistance element between the same kind of electrodes via a dielectric for every two unit transistors which are connected in parallel. CONSTITUTION:In place of conventional chip capacitors for an internal matching circuit on the input side, chip capacitors 19 and 20 which have resistance elements for separating elements are arranged and the input electrodes of unit transistors are connected with a metalized terminal on the input side by connecting lines 21-23. For example, the chip capacitor 19 with a resistance element for separating elements is constructed by connecting a resistance element 25 between electrostatic capacitors 24a and 24b. Since this resistance element 25 absorbs the deviation current generated by the nonuniformity of unit transistors, input power is uniformly distributed and mutual action between the unit transistors is reduced. Therefore, balance in high frequency operations is generally improved, breakdown resisting capability is improved and a high output device is obtained. In addition, as its internal matching circuit is an concentrated constant type, the device can be formed in a small vessel.
JP12356979A 1979-09-26 1979-09-26 Transistor Pending JPS5648156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12356979A JPS5648156A (en) 1979-09-26 1979-09-26 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12356979A JPS5648156A (en) 1979-09-26 1979-09-26 Transistor

Publications (1)

Publication Number Publication Date
JPS5648156A true JPS5648156A (en) 1981-05-01

Family

ID=14863820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12356979A Pending JPS5648156A (en) 1979-09-26 1979-09-26 Transistor

Country Status (1)

Country Link
JP (1) JPS5648156A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61197602A (en) * 1985-02-28 1986-09-01 Nikken Kagaku Kk Novel branched cyclodextrin and its production
JP2014096497A (en) * 2012-11-09 2014-05-22 Sumitomo Electric Device Innovations Inc Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51111066A (en) * 1975-03-26 1976-10-01 Nec Corp High-output semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51111066A (en) * 1975-03-26 1976-10-01 Nec Corp High-output semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61197602A (en) * 1985-02-28 1986-09-01 Nikken Kagaku Kk Novel branched cyclodextrin and its production
JPH0329241B2 (en) * 1985-02-28 1991-04-23 Nikken Chemicals Co Ltd
JP2014096497A (en) * 2012-11-09 2014-05-22 Sumitomo Electric Device Innovations Inc Semiconductor device

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