JPS5644951A - Computer - Google Patents

Computer

Info

Publication number
JPS5644951A
JPS5644951A JP12175179A JP12175179A JPS5644951A JP S5644951 A JPS5644951 A JP S5644951A JP 12175179 A JP12175179 A JP 12175179A JP 12175179 A JP12175179 A JP 12175179A JP S5644951 A JPS5644951 A JP S5644951A
Authority
JP
Japan
Prior art keywords
value
input
register
warning
maximum value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12175179A
Other languages
Japanese (ja)
Inventor
Hiroshi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP12175179A priority Critical patent/JPS5644951A/en
Publication of JPS5644951A publication Critical patent/JPS5644951A/en
Pending legal-status Critical Current

Links

Landscapes

  • Calculators And Similar Devices (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE: To prevent the input operation miss, by providing a means which sets a maximum value or a minimum value previously and generates warning for an input value outside the maximum value or minimum value.
CONSTITUTION: The maximum value and the minimum value to be designated previously are set to registers SR1 and SR2 through processing part CPU by keyboard KB. Next, when the numeric value of input data is input to register R by keyboard KB and the operation key for addition, subtraction, division, or multiplication is depressed, processing part CPU compares contents of register R with the maximum value and the minimum value of registers SR1 and SR2 before operation execution. If input contents of register R are outside the range between the maximum and minimum values, a signal is sent to warning unit WI to report warning by warning indicator DPM.
COPYRIGHT: (C)1981,JPO&Japio
JP12175179A 1979-09-21 1979-09-21 Computer Pending JPS5644951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12175179A JPS5644951A (en) 1979-09-21 1979-09-21 Computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12175179A JPS5644951A (en) 1979-09-21 1979-09-21 Computer

Publications (1)

Publication Number Publication Date
JPS5644951A true JPS5644951A (en) 1981-04-24

Family

ID=14818975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12175179A Pending JPS5644951A (en) 1979-09-21 1979-09-21 Computer

Country Status (1)

Country Link
JP (1) JPS5644951A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6075592A (en) * 1983-08-15 1985-04-27 インペリアル・ケミカル・インダストリ−ズ・ピ−エルシ− Electrolytic cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6075592A (en) * 1983-08-15 1985-04-27 インペリアル・ケミカル・インダストリ−ズ・ピ−エルシ− Electrolytic cell

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