JPS5616354A - Fsk modulating system - Google Patents
Fsk modulating systemInfo
- Publication number
- JPS5616354A JPS5616354A JP9280979A JP9280979A JPS5616354A JP S5616354 A JPS5616354 A JP S5616354A JP 9280979 A JP9280979 A JP 9280979A JP 9280979 A JP9280979 A JP 9280979A JP S5616354 A JPS5616354 A JP S5616354A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- signals
- synchronized
- synchronization
- integer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
- H04L27/2021—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change per symbol period is not constrained
- H04L27/2025—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change per symbol period is not constrained in which the phase changes in a piecewise linear manner within each symbol period
Abstract
PURPOSE:To eliminate the discontinuation of the phase at the switching point of the input data and then increase the reliability, by securing f1=(n-1)B and f2=nB (n>= integer of 2; B: modulating speed) each and at the same time securing the synchronization with the signal of frequency fs=B. CONSTITUTION:If modulating speed B=1,200 Baud and integer n=2 are set each, the signals (f), (c) and (d) having the frequencies fs=B=1,200Hz, f1=(n-1)B= 1,200Hz and f2=nB=2,400Hz each are delivered from signal generating circuit 4. In this case, signals (c) and (d) are synchronized with signal (f). Then input data (a) is synchronized with signal (f) having frequency fs at synchronizing circuit 5 to be formed like signal (e). Thus this signal (e) is modulated at modulating circuit 3 and by signals (c) and (d) to obtain FSK modulation signal (b). In this case, the synchronization is secured perfectly among data (a), signal (c) and signal (d) each. Thus the phase discontinuation which occurs hitherto is never caused to signal (b).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9280979A JPS5616354A (en) | 1979-07-20 | 1979-07-20 | Fsk modulating system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9280979A JPS5616354A (en) | 1979-07-20 | 1979-07-20 | Fsk modulating system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5616354A true JPS5616354A (en) | 1981-02-17 |
Family
ID=14064729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9280979A Pending JPS5616354A (en) | 1979-07-20 | 1979-07-20 | Fsk modulating system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5616354A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61234152A (en) * | 1985-04-09 | 1986-10-18 | Toshiba Corp | Frequency shift keying modulator |
-
1979
- 1979-07-20 JP JP9280979A patent/JPS5616354A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61234152A (en) * | 1985-04-09 | 1986-10-18 | Toshiba Corp | Frequency shift keying modulator |
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