JPS56161790A - Monitoring system for storage circuit - Google Patents
Monitoring system for storage circuitInfo
- Publication number
- JPS56161790A JPS56161790A JP6484880A JP6484880A JPS56161790A JP S56161790 A JPS56161790 A JP S56161790A JP 6484880 A JP6484880 A JP 6484880A JP 6484880 A JP6484880 A JP 6484880A JP S56161790 A JPS56161790 A JP S56161790A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- channel
- subscriber
- address
- coincidence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Exchange Systems With Centralized Control (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
- Monitoring And Testing Of Exchanges (AREA)
Abstract
PURPOSE:To make the monitor of operation for a channel memory and a memory corresponding to a subscriber in real time, by making coincidence between a subscriber address and another address read out from the channel memory, and comparing this output with a channel usage signal read out from the memory corresponding to the subscriber. CONSTITUTION:When a subscriber makes a call, a selection indicating signal is inputted to a channel memory 2, and the detection of a vacant channel is made through the scanning of the memory 2. After the detection, a subscriber address is written in corresponding to the channel and the usage of channel is written in a memory 1 corresponding to the subscriber. On the other hand, the subscriber ad- dress written in the channel memory 2 is read out in channel period. A coincidence circuit 3 requests the coincidence between the subscriber address and the subscriber address output of the channel memory 2. A comparison circuit 4 compares the state of channel usage bit of the memory 1 with the output state of the coincidence circuit 3, the memory 1 or 2 is detected for failure to instruct clearning of the memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6484880A JPS56161790A (en) | 1980-05-16 | 1980-05-16 | Monitoring system for storage circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6484880A JPS56161790A (en) | 1980-05-16 | 1980-05-16 | Monitoring system for storage circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56161790A true JPS56161790A (en) | 1981-12-12 |
JPS6239595B2 JPS6239595B2 (en) | 1987-08-24 |
Family
ID=13270028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6484880A Granted JPS56161790A (en) | 1980-05-16 | 1980-05-16 | Monitoring system for storage circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56161790A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0688285B2 (en) * | 1989-04-21 | 1994-11-09 | 大和技研工業株式会社 | Method for manufacturing heat insulating member made of synthetic resin |
-
1980
- 1980-05-16 JP JP6484880A patent/JPS56161790A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6239595B2 (en) | 1987-08-24 |
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