JPS56157124A - Waveform shaping circuit - Google Patents

Waveform shaping circuit

Info

Publication number
JPS56157124A
JPS56157124A JP6041980A JP6041980A JPS56157124A JP S56157124 A JPS56157124 A JP S56157124A JP 6041980 A JP6041980 A JP 6041980A JP 6041980 A JP6041980 A JP 6041980A JP S56157124 A JPS56157124 A JP S56157124A
Authority
JP
Japan
Prior art keywords
slice level
pattern
adjustment
level
sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6041980A
Other languages
Japanese (ja)
Other versions
JPH0128540B2 (en
Inventor
Toshiyuki Tanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6041980A priority Critical patent/JPS56157124A/en
Publication of JPS56157124A publication Critical patent/JPS56157124A/en
Publication of JPH0128540B2 publication Critical patent/JPH0128540B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
    • H03K5/086—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold generated by feedback

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To ensure high accuracy for a slice level adjustment, by giving a readjustment to the slice level voltage in accordance with the input level every time a data pattern to be used for adjustment of slice level is received, and automatically holding a certain duty ratio. CONSTITUTION:When an edge detecting circuit 11 detects the initiation of a slice level adjusting pattern, a sampling pulse fS is generated from a sampling pulse generating circuit 2. On the other hand, in the period during which the output received a waveform shaping within the period of the pulse fS is at H level, the reference pulse f0 is counted at 6 through a sampling gate 9. The counting value of counter 6 is latched at a latch circuit 7 only when the data pattern within a sampling period is discriminated 10 as a pattern for adjustment of slice level. Then the slice level voltage VS obtained by giving a D/A conversion to the value held at the circuit 7 is adjusted in accordance with the input level of an input signal every time a pattern identical with a pattern for slice level adjustment is received. Thus a stable duty ratio is ensured after shaping waveform.
JP6041980A 1980-05-07 1980-05-07 Waveform shaping circuit Granted JPS56157124A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6041980A JPS56157124A (en) 1980-05-07 1980-05-07 Waveform shaping circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6041980A JPS56157124A (en) 1980-05-07 1980-05-07 Waveform shaping circuit

Publications (2)

Publication Number Publication Date
JPS56157124A true JPS56157124A (en) 1981-12-04
JPH0128540B2 JPH0128540B2 (en) 1989-06-02

Family

ID=13141656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6041980A Granted JPS56157124A (en) 1980-05-07 1980-05-07 Waveform shaping circuit

Country Status (1)

Country Link
JP (1) JPS56157124A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2652697A1 (en) * 1989-10-03 1991-04-05 Sgs Thomson Microelectronics DIGITAL DATA EXTRACTOR IN A VIDEO SIGNAL.

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5560418A (en) * 1978-10-31 1980-05-07 Matsushita Electric Works Ltd Shelf board support device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5560418A (en) * 1978-10-31 1980-05-07 Matsushita Electric Works Ltd Shelf board support device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2652697A1 (en) * 1989-10-03 1991-04-05 Sgs Thomson Microelectronics DIGITAL DATA EXTRACTOR IN A VIDEO SIGNAL.
USRE36749E (en) * 1989-10-03 2000-06-27 Sgs-Thomson Microelectronics S.A. Video signal digital slicing circuit

Also Published As

Publication number Publication date
JPH0128540B2 (en) 1989-06-02

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