JPS56143069A - Bus coupling system - Google Patents

Bus coupling system

Info

Publication number
JPS56143069A
JPS56143069A JP4666980A JP4666980A JPS56143069A JP S56143069 A JPS56143069 A JP S56143069A JP 4666980 A JP4666980 A JP 4666980A JP 4666980 A JP4666980 A JP 4666980A JP S56143069 A JPS56143069 A JP S56143069A
Authority
JP
Japan
Prior art keywords
memory
circuit
data
read
required data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4666980A
Other languages
Japanese (ja)
Other versions
JPS6319903B2 (en
Inventor
Kenji Omori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4666980A priority Critical patent/JPS56143069A/en
Publication of JPS56143069A publication Critical patent/JPS56143069A/en
Publication of JPS6319903B2 publication Critical patent/JPS6319903B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Abstract

PURPOSE:To reduce the number of access times to a main memory, by providing a bus coupler with an associative device consisting of a memory and circuits for discrimination, read-out and write-in in the multiprocessor system of multibus constitution. CONSTITUTION:A plurality of processors PCs 1 are coupled with the main memory 5 via the bus coupler 3 and bus 7. PC1 outputs the memory read-in instruction to the memory 5, and the device 3 receives it at the discrimination circuit 11 of the associative device 10. The circuit 11 judges whether the required data is stored in the memory 30 or not, and if the required data are present, the data are obtained from the memory 30 via the circuit 12. If no required data is present in the memory 30, the read-in of the required data is required from the memory 5 to the write-in circuit 13. The circuit 13 requests the data group of a plurality of consecutive addresses including requesting address to the memory 5 and the data obtained from the memory 5 is writtein in the memory 30 and returned to the circuit 11. Data received from circuits 12 and 13 are sent to PC1 from circuit 11.
JP4666980A 1980-04-09 1980-04-09 Bus coupling system Granted JPS56143069A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4666980A JPS56143069A (en) 1980-04-09 1980-04-09 Bus coupling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4666980A JPS56143069A (en) 1980-04-09 1980-04-09 Bus coupling system

Publications (2)

Publication Number Publication Date
JPS56143069A true JPS56143069A (en) 1981-11-07
JPS6319903B2 JPS6319903B2 (en) 1988-04-25

Family

ID=12753756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4666980A Granted JPS56143069A (en) 1980-04-09 1980-04-09 Bus coupling system

Country Status (1)

Country Link
JP (1) JPS56143069A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61170859A (en) * 1985-01-25 1986-08-01 Hitachi Ltd Computer connecting system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55134459A (en) * 1979-04-06 1980-10-20 Hitachi Ltd Data processing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55134459A (en) * 1979-04-06 1980-10-20 Hitachi Ltd Data processing system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61170859A (en) * 1985-01-25 1986-08-01 Hitachi Ltd Computer connecting system
JPH0416816B2 (en) * 1985-01-25 1992-03-25 Hitachi Ltd

Also Published As

Publication number Publication date
JPS6319903B2 (en) 1988-04-25

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