JPS56104462A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS56104462A JPS56104462A JP751980A JP751980A JPS56104462A JP S56104462 A JPS56104462 A JP S56104462A JP 751980 A JP751980 A JP 751980A JP 751980 A JP751980 A JP 751980A JP S56104462 A JPS56104462 A JP S56104462A
- Authority
- JP
- Japan
- Prior art keywords
- polysilicon layer
- oxide film
- digit line
- substrate
- occupying area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5223—Capacitor integral with wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To decrease the occupying area per bit in the semiconductor memory device by reducing the capacity of a digit line and decreasing the area of the occupying area of the digit line with a multilayer wire. CONSTITUTION:A field inversion preventing P<+> type region 12 and an N type region 13 are formed on a P type semiconductor substrate 11. The first polysilicon layer 15 is formed through a thin oxide film 14 on the substrate 11, and the first polysilicon layer 15 is used as the one electrode of a memory cell capacity. The second polysilicon layer 16 is alternately formed through the surface of the substrate 11 and a thick oxide film 17 as a digit line and an address selecting transistor drain. The third polysilicon layer 19 is formed via an oxide film 20 between the first polysilicon layer 15 and the second polysilicon 16 as an address selecting MOSFET gate electrode. Thus, the memory cell having smaller occupying area per bit can be carried out, and the integration of the device can be increased.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP751980A JPS56104462A (en) | 1980-01-25 | 1980-01-25 | Semiconductor memory device |
EP84114160A EP0154685B1 (en) | 1980-01-25 | 1981-01-21 | Semiconductor memory device |
DE8181100424T DE3173413D1 (en) | 1980-01-25 | 1981-01-21 | Semiconductor memory device |
EP81100424A EP0033130B1 (en) | 1980-01-25 | 1981-01-21 | Semiconductor memory device |
DE8484114160T DE3177173D1 (en) | 1980-01-25 | 1981-01-21 | SEMICONDUCTOR STORAGE DEVICE. |
US06/227,936 US4419682A (en) | 1980-01-25 | 1981-01-23 | Three level poly dynamic ram with poly bit lines |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP751980A JPS56104462A (en) | 1980-01-25 | 1980-01-25 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56104462A true JPS56104462A (en) | 1981-08-20 |
Family
ID=11668015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP751980A Pending JPS56104462A (en) | 1980-01-25 | 1980-01-25 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56104462A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5783049A (en) * | 1980-09-02 | 1982-05-24 | Intel Corp | Mos dynamic memory cell and method of producing same |
CN111430329A (en) * | 2020-04-23 | 2020-07-17 | 合肥晶合集成电路有限公司 | Capacitive semiconductor element |
-
1980
- 1980-01-25 JP JP751980A patent/JPS56104462A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5783049A (en) * | 1980-09-02 | 1982-05-24 | Intel Corp | Mos dynamic memory cell and method of producing same |
JPH0318353B2 (en) * | 1980-09-02 | 1991-03-12 | Intel Corp | |
CN111430329A (en) * | 2020-04-23 | 2020-07-17 | 合肥晶合集成电路有限公司 | Capacitive semiconductor element |
CN111430329B (en) * | 2020-04-23 | 2021-07-27 | 合肥晶合集成电路股份有限公司 | Capacitive semiconductor element |
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