JPS5582449A - Cell of master slice semiconductor integrated circuit - Google Patents
Cell of master slice semiconductor integrated circuitInfo
- Publication number
- JPS5582449A JPS5582449A JP15611978A JP15611978A JPS5582449A JP S5582449 A JPS5582449 A JP S5582449A JP 15611978 A JP15611978 A JP 15611978A JP 15611978 A JP15611978 A JP 15611978A JP S5582449 A JPS5582449 A JP S5582449A
- Authority
- JP
- Japan
- Prior art keywords
- contact
- integrated circuit
- master slice
- lines
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
PURPOSE: To obtain a random logical circuit of high speed and density, by appropriately positioning contact holes in the diffused layers of driving MOS transistors of a master slice integrated circuit in which transistors are bidimensionally arrayed.
CONSTITUTION: One cell of a master slice semiconductor integrated circuit comprises a depletion-type MOS transistor D1 for a load and driving MOS transistors T11, T12, T13, T14 continuous to power lines VSS, VDD. Small circles in Fig. represent contact. N1WN16 denote the contact of aluminium lines with diffused layers. L1WL14 and M1WM10 denote the contact of polycrystalline silicon lines with the aluminium lines. Each contact is located in an appropriate position to facilitate wiring and reduce the area of the diffused layer. This results in reducing the load capacity and enabling rapid operation.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15611978A JPS5582449A (en) | 1978-12-15 | 1978-12-15 | Cell of master slice semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15611978A JPS5582449A (en) | 1978-12-15 | 1978-12-15 | Cell of master slice semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5582449A true JPS5582449A (en) | 1980-06-21 |
JPS635902B2 JPS635902B2 (en) | 1988-02-05 |
Family
ID=15620727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15611978A Granted JPS5582449A (en) | 1978-12-15 | 1978-12-15 | Cell of master slice semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5582449A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5858741A (en) * | 1981-10-05 | 1983-04-07 | Nec Corp | Integrated circuit device |
JPS63296240A (en) * | 1988-04-22 | 1988-12-02 | Nec Corp | Semiconductor integrated circuit device |
-
1978
- 1978-12-15 JP JP15611978A patent/JPS5582449A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5858741A (en) * | 1981-10-05 | 1983-04-07 | Nec Corp | Integrated circuit device |
JPH0122734B2 (en) * | 1981-10-05 | 1989-04-27 | Nippon Electric Co | |
JPS63296240A (en) * | 1988-04-22 | 1988-12-02 | Nec Corp | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPS635902B2 (en) | 1988-02-05 |
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