JPS5566184A - Clock pulse generator circuit for picture broadcast receiver - Google Patents

Clock pulse generator circuit for picture broadcast receiver

Info

Publication number
JPS5566184A
JPS5566184A JP13951278A JP13951278A JPS5566184A JP S5566184 A JPS5566184 A JP S5566184A JP 13951278 A JP13951278 A JP 13951278A JP 13951278 A JP13951278 A JP 13951278A JP S5566184 A JPS5566184 A JP S5566184A
Authority
JP
Japan
Prior art keywords
signal
circuit
picture
broadcast signal
picture broadcast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13951278A
Other languages
Japanese (ja)
Inventor
Takahiro Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP13951278A priority Critical patent/JPS5566184A/en
Publication of JPS5566184A publication Critical patent/JPS5566184A/en
Pending legal-status Critical Current

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  • Television Systems (AREA)

Abstract

PURPOSE: To ensure the generation of the steady clock pulse synchronized with the data signal by increasing the exciting pulses of the crystal oscillator when receiving the picture broadcast signal composed of the line signal and the data signal synchronized with the line signal.
CONSTITUTION: With application of the video signal multiplied with the picture broadcast signal, multiplied signal sampling circuit 2 samples and delivers the picture broadcast signal. This picture broadcast signal output is converted into the double-frequency pulse through multiplier circuit 7 and then applied to crystal oscillation circuit 8. Circuit 8 is excited with this broadcast signal to keep the steady oscillation for the fixed time even after end of the excitation. The output of circuit 8 is then amplified 9 and converted through emitter-follower amplifier 10 into the pulse featuring the symmetric properties to be then given the phase control for application to sampling of the control signal through 1st phase controller circuit 14 after division 13 through inverter 12. At the same time, 2nd phase controller circuit 16 gives the phase control to the output of inverter 12 for application to sampling of the picture signal.
COPYRIGHT: (C)1980,JPO&Japio
JP13951278A 1978-11-13 1978-11-13 Clock pulse generator circuit for picture broadcast receiver Pending JPS5566184A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13951278A JPS5566184A (en) 1978-11-13 1978-11-13 Clock pulse generator circuit for picture broadcast receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13951278A JPS5566184A (en) 1978-11-13 1978-11-13 Clock pulse generator circuit for picture broadcast receiver

Publications (1)

Publication Number Publication Date
JPS5566184A true JPS5566184A (en) 1980-05-19

Family

ID=15247020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13951278A Pending JPS5566184A (en) 1978-11-13 1978-11-13 Clock pulse generator circuit for picture broadcast receiver

Country Status (1)

Country Link
JP (1) JPS5566184A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921184A (en) * 1982-07-28 1984-02-03 Toshiba Corp Clock reproducing circuit of data signal fetching
US4673979A (en) * 1984-06-15 1987-06-16 Matsushita Electric Industrial Co., Ltd. Digital data reproducing system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165822A (en) * 1974-12-05 1976-06-07 Matsushita Electric Ind Co Ltd SEISHIGAZO JUSHINSOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5165822A (en) * 1974-12-05 1976-06-07 Matsushita Electric Ind Co Ltd SEISHIGAZO JUSHINSOCHI

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921184A (en) * 1982-07-28 1984-02-03 Toshiba Corp Clock reproducing circuit of data signal fetching
JPH0415677B2 (en) * 1982-07-28 1992-03-18 Tokyo Shibaura Electric Co
US4673979A (en) * 1984-06-15 1987-06-16 Matsushita Electric Industrial Co., Ltd. Digital data reproducing system

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