JPS5557953A - Dispatching control system of virtual computer system - Google Patents

Dispatching control system of virtual computer system

Info

Publication number
JPS5557953A
JPS5557953A JP13081978A JP13081978A JPS5557953A JP S5557953 A JPS5557953 A JP S5557953A JP 13081978 A JP13081978 A JP 13081978A JP 13081978 A JP13081978 A JP 13081978A JP S5557953 A JPS5557953 A JP S5557953A
Authority
JP
Japan
Prior art keywords
timer
cpu
virtual computer
dispatching
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13081978A
Other languages
Japanese (ja)
Other versions
JPS6313218B2 (en
Inventor
Hideo Suzuki
Toshihiko Ando
Takashi Matsunaga
Yukichi Ikuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13081978A priority Critical patent/JPS5557953A/en
Publication of JPS5557953A publication Critical patent/JPS5557953A/en
Publication of JPS6313218B2 publication Critical patent/JPS6313218B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To reduce an overhead by providing a virtual computer system with a timer whlch is exclusively used only by a control program and then by dispatching operating system OS by using it.
CONSTITUTION: Among several CPU timers on main memory MEM2, virtual computer monitor MM sets the value of CPU timer 6-i, corresponding to dispatched virtual computer VM, in CPU timer 4. The dispatching of a VM program is carried out and in CPU timer 4, the value of a CPU timer corresponding to newly-dispatched VM is set. An interruption code by a RVM timer 3 is newly defined and an interruption code is stored in a fixed area of MEM2. As a result, there is no need for CPU timers to share VMM and OS of VM and they can be brought under the control of VM, so that the overhead of an interruption process can be reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP13081978A 1978-10-24 1978-10-24 Dispatching control system of virtual computer system Granted JPS5557953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13081978A JPS5557953A (en) 1978-10-24 1978-10-24 Dispatching control system of virtual computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13081978A JPS5557953A (en) 1978-10-24 1978-10-24 Dispatching control system of virtual computer system

Publications (2)

Publication Number Publication Date
JPS5557953A true JPS5557953A (en) 1980-04-30
JPS6313218B2 JPS6313218B2 (en) 1988-03-24

Family

ID=15043446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13081978A Granted JPS5557953A (en) 1978-10-24 1978-10-24 Dispatching control system of virtual computer system

Country Status (1)

Country Link
JP (1) JPS5557953A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140437A (en) * 1983-12-28 1985-07-25 Hitachi Ltd Virtual computer system timer control system
WO2001067243A1 (en) * 2000-03-08 2001-09-13 Mitsubishi Denki Kabushiki Kaisha Method for processor power-saving, recorded medium, and processor power-saving controller

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0270705U (en) * 1988-11-16 1990-05-29

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5378138A (en) * 1976-12-22 1978-07-11 Fujitsu Ltd Processing system for multiplex interruption

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5378138A (en) * 1976-12-22 1978-07-11 Fujitsu Ltd Processing system for multiplex interruption

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140437A (en) * 1983-12-28 1985-07-25 Hitachi Ltd Virtual computer system timer control system
WO2001067243A1 (en) * 2000-03-08 2001-09-13 Mitsubishi Denki Kabushiki Kaisha Method for processor power-saving, recorded medium, and processor power-saving controller
US7120911B1 (en) 2000-03-08 2006-10-10 Mitsubishi Denki Kabushiki Kaisha Processor power-saving control method, storage medium, and processor power-saving control device

Also Published As

Publication number Publication date
JPS6313218B2 (en) 1988-03-24

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