JPS5544652A - Keyboard input simulation device - Google Patents

Keyboard input simulation device

Info

Publication number
JPS5544652A
JPS5544652A JP11821378A JP11821378A JPS5544652A JP S5544652 A JPS5544652 A JP S5544652A JP 11821378 A JP11821378 A JP 11821378A JP 11821378 A JP11821378 A JP 11821378A JP S5544652 A JPS5544652 A JP S5544652A
Authority
JP
Japan
Prior art keywords
buffer
counter
keyboard input
keyboard
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11821378A
Other languages
Japanese (ja)
Inventor
Shizuo Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11821378A priority Critical patent/JPS5544652A/en
Publication of JPS5544652A publication Critical patent/JPS5544652A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize an electric and high-speed test for the input unit by delivering the simulation sequence data for keyboard input in sequence onto the keyboard interface based on the interface rule of the tested system.
CONSTITUTION: When the data equivalent to one block is read into block buffer 12 from input unit 11 among the simulation sequence data for keyboard input which is decided previously, address counter 13 is set to the initial value. And based on the contents of counter 13, selector 14 selects one letter in buffer 12 to then set it to 1- character buffer 15. After this, the signal to set flip-flop 16 for a fixed time is delivered from control part 18 to form the strobe signal, and thus the contents of buffer 15 are sent to the system. Then counter 13 receives addition of +1, and the above operation is repeated until the finish is detected by decoder 17.
COPYRIGHT: (C)1980,JPO&Japio
JP11821378A 1978-09-25 1978-09-25 Keyboard input simulation device Pending JPS5544652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11821378A JPS5544652A (en) 1978-09-25 1978-09-25 Keyboard input simulation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11821378A JPS5544652A (en) 1978-09-25 1978-09-25 Keyboard input simulation device

Publications (1)

Publication Number Publication Date
JPS5544652A true JPS5544652A (en) 1980-03-29

Family

ID=14731002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11821378A Pending JPS5544652A (en) 1978-09-25 1978-09-25 Keyboard input simulation device

Country Status (1)

Country Link
JP (1) JPS5544652A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5790717U (en) * 1980-11-26 1982-06-04
JPS6014351A (en) * 1983-07-05 1985-01-24 Nec Corp Automatic test system
JPH0648974U (en) * 1992-12-16 1994-07-05 小原株式会社 Shock absorber in pressurizing cylinder for welding machine

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5790717U (en) * 1980-11-26 1982-06-04
JPS6014351A (en) * 1983-07-05 1985-01-24 Nec Corp Automatic test system
JPH0648974U (en) * 1992-12-16 1994-07-05 小原株式会社 Shock absorber in pressurizing cylinder for welding machine

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