JPS55140952A - Fault processing system - Google Patents

Fault processing system

Info

Publication number
JPS55140952A
JPS55140952A JP4794479A JP4794479A JPS55140952A JP S55140952 A JPS55140952 A JP S55140952A JP 4794479 A JP4794479 A JP 4794479A JP 4794479 A JP4794479 A JP 4794479A JP S55140952 A JPS55140952 A JP S55140952A
Authority
JP
Japan
Prior art keywords
signal
transmitted
cpu0
main memory
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4794479A
Other languages
Japanese (ja)
Inventor
Katsumi Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4794479A priority Critical patent/JPS55140952A/en
Publication of JPS55140952A publication Critical patent/JPS55140952A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent previously the propagation of the machine check and thus to increase the reliability, by informing the fault occurred to the main memory device and while the request from one unit of CPU is being processed not only to the CPU which transmitted the request but also to all CPUs sharing the main memory device.
CONSTITUTION: Both CPU0 and CPU1 are connected to main memory device MS to form the information processor. And when start signal EX is transmitted to device MS from CPU0, the fact that signal line 8 from FF7 of device MS is logic 1 is confirmed through AND gate 2. Then signal EX is transmitted to device MS. Receiving signal EX, device MS starts the processing, and then set FF7 in case the recovery unable fault is detected in the course of processing. And CPU0 detects the time-out check since no action end signal ADV is sent back. In such condition, AND gate 5 is not set up since the state of line 8 features logic 0 although CPU1 tries to transmit signal EX. Thus no signal EX can be transmitted, and as a result, the propagation of the machine check can be prevented previously.
COPYRIGHT: (C)1980,JPO&Japio
JP4794479A 1979-04-20 1979-04-20 Fault processing system Pending JPS55140952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4794479A JPS55140952A (en) 1979-04-20 1979-04-20 Fault processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4794479A JPS55140952A (en) 1979-04-20 1979-04-20 Fault processing system

Publications (1)

Publication Number Publication Date
JPS55140952A true JPS55140952A (en) 1980-11-04

Family

ID=12789466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4794479A Pending JPS55140952A (en) 1979-04-20 1979-04-20 Fault processing system

Country Status (1)

Country Link
JP (1) JPS55140952A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5955558A (en) * 1982-09-22 1984-03-30 Fujitsu Ltd Cache memory control system
JPH03179534A (en) * 1989-12-08 1991-08-05 Hitachi Ltd Faulty processor discriminating system
JPH06214969A (en) * 1992-09-30 1994-08-05 Internatl Business Mach Corp <Ibm> Method and equipment for information communication

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5955558A (en) * 1982-09-22 1984-03-30 Fujitsu Ltd Cache memory control system
JPH0122933B2 (en) * 1982-09-22 1989-04-28 Fujitsu Ltd
JPH03179534A (en) * 1989-12-08 1991-08-05 Hitachi Ltd Faulty processor discriminating system
JPH06214969A (en) * 1992-09-30 1994-08-05 Internatl Business Mach Corp <Ibm> Method and equipment for information communication
US5600791A (en) * 1992-09-30 1997-02-04 International Business Machines Corporation Distributed device status in a clustered system environment

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