JPS55108073A - Graph conversion unit - Google Patents

Graph conversion unit

Info

Publication number
JPS55108073A
JPS55108073A JP1667379A JP1667379A JPS55108073A JP S55108073 A JPS55108073 A JP S55108073A JP 1667379 A JP1667379 A JP 1667379A JP 1667379 A JP1667379 A JP 1667379A JP S55108073 A JPS55108073 A JP S55108073A
Authority
JP
Japan
Prior art keywords
signal line
pattern memory
dimensional pattern
signal
high speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1667379A
Other languages
Japanese (ja)
Other versions
JPS6217236B2 (en
Inventor
Hitoshi Miyai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1667379A priority Critical patent/JPS55108073A/en
Publication of JPS55108073A publication Critical patent/JPS55108073A/en
Publication of JPS6217236B2 publication Critical patent/JPS6217236B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Image Processing (AREA)
  • Digital Computer Display Output (AREA)
  • Memory System (AREA)

Abstract

PURPOSE: To enable to rotate, extend and shrink the two-dimensional pattern memory in high speed, by using the carry over or down signal to the input clock given to the signal line and performing the control of addition and subtraction.
CONSTITUTION: The two-dimensional pattern memory 300 stores or reads out the two dimensional dot pattern quantized with the dot matrix. Further, the external input indicated in the adder 420 and the register 410 is sequentially added or subtracted to give initial value to the signal line 8003, and carry over or down signal is used to the input clock given to the signal line 8001 and control is made that the adders 410, 430, 520, and 550 are operated. Further, numeral 1 is fixedly given to the signal line 8004, and the output of count up or down incremented or decremented by 1 is outputted by using the signal line 4101. Thus, the two-dimensional pattern memory can be rotated, extended and shrinked in high speed.
COPYRIGHT: (C)1980,JPO&Japio
JP1667379A 1979-02-14 1979-02-14 Graph conversion unit Granted JPS55108073A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1667379A JPS55108073A (en) 1979-02-14 1979-02-14 Graph conversion unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1667379A JPS55108073A (en) 1979-02-14 1979-02-14 Graph conversion unit

Publications (2)

Publication Number Publication Date
JPS55108073A true JPS55108073A (en) 1980-08-19
JPS6217236B2 JPS6217236B2 (en) 1987-04-16

Family

ID=11922822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1667379A Granted JPS55108073A (en) 1979-02-14 1979-02-14 Graph conversion unit

Country Status (1)

Country Link
JP (1) JPS55108073A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58171178A (en) * 1982-03-31 1983-10-07 Junichi Nishizawa Electronic type camera
JPS607477A (en) * 1983-06-27 1985-01-16 ヤマハ株式会社 Image display
JPS6021088A (en) * 1983-07-15 1985-02-02 株式会社日立製作所 Crt controller
JPS6220069A (en) * 1985-07-19 1987-01-28 Canon Inc Image information conversion system
JPS6378277A (en) * 1986-09-20 1988-04-08 Fujitsu Ltd Order forming system in image information system
WO1991002345A1 (en) * 1989-08-01 1991-02-21 Ricoh Co., Ltd. Image processor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58171178A (en) * 1982-03-31 1983-10-07 Junichi Nishizawa Electronic type camera
JPH0446031B2 (en) * 1982-03-31 1992-07-28 Junichi Nishizawa
JPS607477A (en) * 1983-06-27 1985-01-16 ヤマハ株式会社 Image display
JPS6021088A (en) * 1983-07-15 1985-02-02 株式会社日立製作所 Crt controller
JPS6220069A (en) * 1985-07-19 1987-01-28 Canon Inc Image information conversion system
JPS6378277A (en) * 1986-09-20 1988-04-08 Fujitsu Ltd Order forming system in image information system
WO1991002345A1 (en) * 1989-08-01 1991-02-21 Ricoh Co., Ltd. Image processor

Also Published As

Publication number Publication date
JPS6217236B2 (en) 1987-04-16

Similar Documents

Publication Publication Date Title
JPS55108073A (en) Graph conversion unit
JPS55153052A (en) Digital multiplier
JPS5295923A (en) Input panel
JPS5619184A (en) Print system
JPS547922A (en) Predominant change-over device for electronic instrument
JPS5510688A (en) Control circuit
JPS53142844A (en) Information processor
JPS5378133A (en) Processing method for binary data conversion
JPS5668834A (en) Logarithm converting device
JPS5422140A (en) Digital differential analyzer
JPS5534706A (en) Picture reducing system
JPS5518706A (en) Parallel adder circuit
JPS52130522A (en) Electromagnetic couplig type data input unit
JPS54132144A (en) Multiple process system
JPS52144922A (en) Numeric input unit
JPS52147036A (en) Operation control system
JPS53103335A (en) Logic arithmetic circuit
JPS5347243A (en) Logarithmic arithmetic unit
JPS5335136A (en) Stability discrimination in large scale power systems
JPS52147037A (en) Operation control system
JPS5421229A (en) Data fetch system
JPS545630A (en) Pattern deformation device using dot matrix
JPS5582352A (en) Multiplication and division operation system
JPS52144953A (en) Non-linear analog digital conversion unit
JPS52141533A (en) Arithmetic system